More precise typing at the C-- and Mach level:

- Register type "Addr" is split into
    . "Val" (well-formed OCaml values, appropriate as GC roots)
    . "Addr" (derived pointers within the heap, must not survive a GC)
- memory_chunk "Word" is split into
    . "Word_val" (OCaml value)
    . "Word_int" (native-sized integer, not a pointer into the heap)

Cmmgen was updated to use Word_val or Word_int as appropriate.

Application #1: fail at compile-time if a derived pointer within the heap
survives a GC point (cf. PR#6484).

Application #2: CSE can do a better job across allocation points
(keep factoring expressions of type Int, Val, Float, but not Addr).


git-svn-id: http://caml.inria.fr/svn/ocaml/branches/cmm-mach-types@15568 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02

1 files changed, 7 insertions, 4 deletions

diff --git a/asmcomp/cmm.ml b/asmcomp/cmm.ml
index 67ee3445fd..52cd1e5db4 100644
--- a/asmcomp/cmm.ml
+++ b/asmcomp/cmm.ml
@@ -11,19 +11,21 @@
 (***********************************************************************)
 
 type machtype_component =
-    Addr
+  | Val
+  | Addr
   | Int
   | Float
 
 type machtype = machtype_component array
 
 let typ_void = ([||] : machtype_component array)
+let typ_val = [|Val|]
 let typ_addr = [|Addr|]
 let typ_int = [|Int|]
 let typ_float = [|Float|]
 
 let size_component = function
-    Addr -> Arch.size_addr
+  | Val | Addr -> Arch.size_addr
   | Int -> Arch.size_int
   | Float -> Arch.size_float
 
@@ -59,7 +61,8 @@ type memory_chunk =
   | Sixteen_signed
   | Thirtytwo_unsigned
   | Thirtytwo_signed
-  | Word
+  | Word_int
+  | Word_val
   | Single
   | Double
   | Double_u
@@ -73,7 +76,7 @@ type operation =
   | Caddi | Csubi | Cmuli | Cmulhi | Cdivi | Cmodi
   | Cand | Cor | Cxor | Clsl | Clsr | Casr
   | Ccmpi of comparison
-  | Cadda | Csuba
+  | Caddv | Cadda
   | Ccmpa of comparison
   | Cnegf | Cabsf
   | Caddf | Csubf | Cmulf | Cdivf