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| author | Xavier Leroy <xavier.leroy@inria.fr> | 2009-05-04 13:46:46 +0000 |
|---|---|---|
| committer | Xavier Leroy <xavier.leroy@inria.fr> | 2009-05-04 13:46:46 +0000 |
| commit | 4e50c497a873e7db9a7aa1c0a04ef39fb04a6cda (patch) | |
| tree | 5f76f817b7bbc23bfa12403d2ff9537d760378ed /bytecomp/dll.ml | |
| parent | 5ba174438fe1d6038f483676aba2ad65eb7b709b (diff) | |
| download | ocaml-4e50c497a873e7db9a7aa1c0a04ef39fb04a6cda.tar.gz | |
Updating the ARM port, continued:
- Reserve register r9 and treat r10 as callee-save, as per the EABI.
- Treatment of alloc_limit register.
- Fixed bug in inlined allocation sequence.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@9252 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
Diffstat (limited to 'bytecomp/dll.ml')
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