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Diffstat (limited to 'target/linux/bcm53xx/patches-5.4/033-v5.10-0003-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch')
-rw-r--r--target/linux/bcm53xx/patches-5.4/033-v5.10-0003-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch26
1 files changed, 26 insertions, 0 deletions
diff --git a/target/linux/bcm53xx/patches-5.4/033-v5.10-0003-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch b/target/linux/bcm53xx/patches-5.4/033-v5.10-0003-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
new file mode 100644
index 0000000000..d3e2fbcc9e
--- /dev/null
+++ b/target/linux/bcm53xx/patches-5.4/033-v5.10-0003-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
@@ -0,0 +1,26 @@
+From c4cd6fcae46fd14aed8665b7cf66d0954765a873 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sat, 22 Aug 2020 18:19:21 +0200
+Subject: [PATCH] ARM: dts: BCM5301X: Specify pcie2 in the DT
+
+The SoC supports three pcie ports. Currently, only
+pcie0 and pcie1 are enabled. This patch adds the
+pcie2 port as well.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+Reviewed-by: Scott Branden <scott.branden@broadcom.com>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -252,6 +252,10 @@
+ reg = <0x00013000 0x1000>;
+ };
+
++ pcie2: pcie@14000 {
++ reg = <0x00014000 0x1000>;
++ };
++
+ usb2: usb2@21000 {
+ reg = <0x00021000 0x1000>;
+