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* lspci: Print IOMMU groups with -viommu_groupAlex Xu (Hello71)2020-02-283-4/+21
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* setpci: Added an option to skip the bus scan if possibleMartin Mares2020-02-232-62/+126
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* pci.h: Explain pci_dev->auxMartin Mares2020-02-231-1/+1
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* Released version 3.6.4.v3.6.4Martin Mares2020-01-253-4/+12
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* VPD: When printing item IDs, escape non-ASCII charactersMartin Mares2020-01-251-4/+8
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* New access method: Hurd via RPCsJoan Lledó2020-01-256-3/+382
| | | | A new module for the Hurd that accesses PCI bus using available RPCs.
* Makefile: Fixed bugs in distcleanv3.6.3Martin Mares2020-01-221-1/+1
| | | | This will be the real 3.6.3.
* pciutils.lsm: Updated primary siteMartin Mares2020-01-221-1/+1
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* Released as 3.6.3Martin Mares2020-01-223-6/+6
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* Updated pci.ids to today's snapshot.Martin Mares2020-01-221-40/+421
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* ChangeLog for 3.6.3Martin Mares2020-01-221-0/+31
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* Fixed buffer overflows in ls-tree.cMartin Mares2020-01-222-22/+47
| | | | | | | | | | | As reported in GitHub issue #24, tree dumping mode can smash the stack if the hierarchy of buses is too deep. Increased line buffer size to 1024 and switched to use of snprintf everywhere, so that in the worst case, the line is truncated. As snprintf can be problematic on obscure platforms, I wrapped it in tree_printf(), so that we can add #ifdefs should problems arise.
* Cleaned up dumping of expansion ROM regionsMartin Mares2020-01-221-6/+12
| | | | | "[virtual]" and "[enhanced]" are now printed after the base address along with other flags.
* Cleaned up dumping of I/O and memory regionsMartin Mares2020-01-221-31/+48
| | | | | | | | | | Originally, I wanted to fix a bug, which caused 64-bit addresses with their lower 32 bits zero to be reported as virtual regions. However, it turned out that the whole function is quite messy, so I rewrote it. Also, we now print "[virtual]" and "[enhanced]" after the base address along other modifiers.
* Man page: Multiple Module attributes can occur in -vmm formatMartin Mares2020-01-221-1/+1
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* Added a man page for pci.idsMartin Mares2020-01-214-3/+98
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* Verbosity of Secondary PCI Express cap should not depend on device typeMartin Mares2020-01-211-3/+3
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* names-net: Avoid buffer overflow warnings by newer gccMartin Mares2020-01-211-1/+1
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* lspci: Change output for bridge with empty range to "[disabled]"Kelsey Skunberg2020-01-211-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Change output displayed for memory behind bridge when the range is empty to be consistent between each verbosity level. Replace "None" and "[empty]" with "[disabled]". Old and new output examples listed below for each verbosity level. Show_range() is not called unless verbose == true. No output given unless a verbose argument is provided. OLD output for -v and -vv which uses "None" and -vvv uses "[empty]": Memory behind bridge: None # lspci -v Memory behind bridge: None # lspci -vv Memory behind bridge: 0000e000-0000efff [empty] # lspci -vvv NEW output for -v, -vv, and -vvv to use "[disabled]": Memory behind bridge: [disabled] # lspci -v Memory behind bridge: [disabled] # lspci -vv Memory behind bridge: 0000e000-0000efff [disabled] # lspci -vvv Advantage is consistent output regardless of verbosity level chosen and to simplify the code. Signed-off-by: Kelsey Skunberg <skunberg.kelsey@gmail.com>
* lspci: Remove unnecessary !verbose check in show_range()Kelsey Skunberg2020-01-211-9/+3
| | | | | | | | | | | | | Remove 'if (!verbose)' code in show_range() due to not being called. show_range() will only be called when verbose is true. Additional call to check for verbosity within show_range() is dead code. !verbose was used so nothing would print if the range behind a bridge had a base > limit and verbose == false. Since show_range() will not be called when verbose == false, not printing bridge information is still accomplished. Signed-off-by: Kelsey Skunberg <skunberg.kelsey@gmail.com>
* lspci: Include -vvv option in helpKelsey Skunberg2020-01-211-1/+1
| | | | | | Include -vvv in help message. Signed-off-by: Kelsey Skunberg <skunberg.kelsey@gmail.com>
* lspci: Reorder Express Root Complex registers to Cap, Ctl, StaBjorn Helgaas2020-01-211-5/+7
| | | | | | | | | | | Registers in the PCI Express Capability come in sets of three (Capability, Control, Status), and we typically print them in that order. The Root Complex-related registers were an exception: we printed them in the (Control, Capability, Status) order. Decode the RootCap, RootCtl, and RootSta registers in the usual order. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* Updated pci.ids to today's snapshotMartin Mares2019-10-301-194/+1660
| | | | This includes clarified copyright statement.
* Switched to a new primary distribution siteMartin Mares2019-09-263-3/+4
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* lspci: Add PCIe 5.0 data rate (32 GT/s) supportGustavo Pimentel2019-06-041-0/+4
| | | | | | | | This enables "lspci" to show PCIe 5.0 data rate (32 GT/s) properly according to the contents in register PCI_EXP_LNKCAP, PCI_EXP_LNKSTA and PCI_EXP_LNKCTL2. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
* lspci: Decode all defined fields in the Device Capabilities 2 registerFrederick Lawler2019-02-223-17/+105
| | | | | | | | | | | | | | Decode all defined fields in the Device Capabilities 2 register. The difference from "lspci -vv" output now looks like this: - DevCap2: Completion Timeout: Range ABC, TimeoutDis+, LTR+, OBFF Not Supported ARIFwd+ + DevCap2: Completion Timeout: Range ABC, TimeoutDis+, NROPrPrP-, LTR+ + 10BitTagComp-, 10BitTagReq-, OBFF Not Supported, ExtFmt-, EETLPPrefix- + EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit- + FRS-, LN System CLS Not Supported, TPHComp-, ExtTPHComp-, ARIFwd+ Signed-off-by: Frederick Lawler <fred@fredlawl.com>
* Set PCI_HAVE_64BIT_ADDRESS for NetBSD.Masanobu SAITOH2019-02-131-0/+1
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* lspci: Fix extra newline if L1.2 is not supported.Vinson Lee2019-02-131-9/+11
| | | | | Fixes: fb17077dc378 ("Cleaned up the previous patch") Signed-off-by: Vinson Lee <vlee@freedesktop.org>
* Fixed memory initialization bug in previous commitMartin Mares2019-02-131-0/+1
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* Library: The list of capabilities is ordered properlyMartin Mares2018-12-312-2/+6
| | | | | Ordering of our cached list of capabilities now respects the original order in the device's configuration space.
* "Function-Level Reset" device capability is displayed for RCiEPMartin Mares2018-12-311-2/+2
| | | | | According to discussion in GitHub PR #8, Root complex integrated endpoints also support FLR.
* Cosmetic cleanups of the previous commitMartin Mares2018-12-312-7/+7
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* lspci: Add support for Secondary PCI Express Extended CapabilityBasavaraja M S2018-12-312-1/+40
| | | | Signed-off-by: Basavaraja M S <basavam@cadence.com>
* Fix solaris buildAndrew Stormont2018-12-311-0/+8
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* README.Windows: Replaced broken link to winioMartin Mares2018-12-311-2/+4
| | | | New URLs suggested by GitHub PR #20.
* setpci: Add capability namesBjorn Helgaas2018-11-121-0/+25
| | | | | | Add capability names for all the capabilities known to lspci. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* lspci: Decode Multicast Extended CapabilityBjorn Helgaas2018-11-123-0/+334
| | | | | | | Decode the Multicast Extended Capability described in PCIe r4.0, sec 7.9.11. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* setpci: Pluralize 'capability' in error if neededDaniel Schaefer2018-11-121-2/+3
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* Caps: fixed silly bug introduced in d7d9e30534eb55145e7033018ee945b09de6928aMartin Mares2018-11-121-1/+1
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* Add a couple of missing va_end'sMichal Hlavinka2018-10-162-0/+11
| | | | Found by Coverity scan.
* Fix device_class calculatoin for non-root FreeBSD usersOleksandr Tymoshenko2018-10-161-1/+1
| | | | | | | | | | libpci uses PCIOCGETCONF for non-privileged access to /dev/pci and calculates device_class value based on pc_class/pc_subclass fields expecting the former to be higher 8 bits of the target value. 0f3d0ca73ecedaba180bf4607bb57fb8abe6d405 errorneously swapped order of class/subclass during calculations. Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
* lspci: Allow -s with -t to show a subtreeGera Kazakov2018-10-143-7/+19
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* Cleaned up pci_find_cap_nr()Martin Mares2018-10-142-24/+20
| | | | | The cap_number is always set to the total number of capability instances found, regardless of whether a match was found or not.
* Enable setpci to target n-th capability of idDaniel Schaefer2018-10-142-7/+33
| | | | | | | | Because a capability can exist multiple times with the same id, there needs to be a way to target a specific one. Instead of the current behaviour which always targets the first one. Now you can optionally add `@number` (e.g `@1`) after the width to choose which one to target.
* libpci is now able to find a specific instance of a capabilityDaniel Schaefer2018-10-143-2/+42
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* Docs: Prefer httpsMartin Mares2018-10-142-6/+6
| | | | Suggested by Milan Kral.
* update-pciids: Download pci.ids over HTTPSMartin Mares2018-10-141-1/+1
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* Print Root complex related registers on RCEC, tooMasanobu SAITOH2018-10-141-2/+2
| | | | | | PCIe spec says root ports and root complex event collectors must implement root CAP, STAT and CTRL registers, so call cap_express_root() not only for PCI_EXP_TYPE_ROOT_PORT but also for PCI_EXP_TYPE_ROOT_EC.
* Released as 3.6.2v3.6.2Martin Mares2018-08-123-3/+16
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* Updated pci.ids to today's snapshotMartin Mares2018-08-121-183/+306
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