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author | zherczeg <zherczeg@2f5784b3-3f2a-0410-8824-cb99058d5e15> | 2012-01-17 11:52:43 +0000 |
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committer | zherczeg <zherczeg@2f5784b3-3f2a-0410-8824-cb99058d5e15> | 2012-01-17 11:52:43 +0000 |
commit | 305ba99ed65522dbeef23c125eed3271cde7fbf8 (patch) | |
tree | 093a34a9566ef9ca0528b0fd9094c4b15538d284 | |
parent | c79fd890ec446bf923ba9d4f16e54908db38df29 (diff) | |
download | pcre-305ba99ed65522dbeef23c125eed3271cde7fbf8.tar.gz |
JIT test prints cpu info
git-svn-id: svn://vcs.exim.org/pcre/code/trunk@884 2f5784b3-3f2a-0410-8824-cb99058d5e15
-rw-r--r-- | pcre.h.in | 1 | ||||
-rw-r--r-- | pcre_config.c | 8 | ||||
-rw-r--r-- | pcre_internal.h | 1 | ||||
-rw-r--r-- | pcre_jit_compile.c | 6 | ||||
-rw-r--r-- | pcre_jit_test.c | 14 | ||||
-rw-r--r-- | sljit/sljitLir.c | 26 | ||||
-rw-r--r-- | sljit/sljitNativeARM_Thumb2.c | 2 | ||||
-rw-r--r-- | sljit/sljitNativeARM_v5.c | 4 | ||||
-rw-r--r-- | sljit/sljitNativeMIPS_common.c | 6 | ||||
-rw-r--r-- | sljit/sljitNativePPC_common.c | 6 | ||||
-rw-r--r-- | sljit/sljitNativeX86_common.c | 6 |
11 files changed, 59 insertions, 21 deletions
@@ -249,6 +249,7 @@ compatible. */ #define PCRE_CONFIG_BSR 8 #define PCRE_CONFIG_JIT 9 #define PCRE_CONFIG_UTF16 10 +#define PCRE_CONFIG_JITTARGET 11 /* Request types for pcre_study(). Do not re-arrange, in order to remain compatible. */ diff --git a/pcre_config.c b/pcre_config.c index a22bf90..aa0ef86 100644 --- a/pcre_config.c +++ b/pcre_config.c @@ -117,6 +117,14 @@ switch (what) #endif break; + case PCRE_CONFIG_JITTARGET: +#ifdef SUPPORT_JIT + *((const char **)where) = PRIV(jit_get_target)(); +#else + *((const char **)where) = NULL; +#endif + break; + case PCRE_CONFIG_NEWLINE: *((int *)where) = NEWLINE; break; diff --git a/pcre_internal.h b/pcre_internal.h index 49558e1..94d33e0 100644 --- a/pcre_internal.h +++ b/pcre_internal.h @@ -2285,6 +2285,7 @@ extern int PRIV(jit_exec)(const REAL_PCRE *, void *, const pcre_uchar *, int, int, int, int, int *, int); extern void PRIV(jit_free)(void *); extern int PRIV(jit_get_size)(void *); +extern const char* PRIV(jit_get_target)(void); #endif /* Unicode character database (UCD) */ diff --git a/pcre_jit_compile.c b/pcre_jit_compile.c index e53cba4..2f77bbe 100644 --- a/pcre_jit_compile.c +++ b/pcre_jit_compile.c @@ -6814,6 +6814,12 @@ PRIV(jit_get_size)(void *executable_func) return ((executable_function*)executable_func)->executable_size; } +const char* +PRIV(jit_get_target)(void) +{ +return sljit_get_platform_name(); +} + #ifdef COMPILE_PCRE8 PCRE_EXP_DECL pcre_jit_stack * pcre_jit_stack_alloc(int startsize, int maxsize) diff --git a/pcre_jit_test.c b/pcre_jit_test.c index 26a6f34..e226dc0 100644 --- a/pcre_jit_test.c +++ b/pcre_jit_test.c @@ -860,6 +860,7 @@ static int regression_tests(void) { struct regression_test_case *current = regression_test_cases; const char *error; + const char *cpu_info; int i, err_offs; int is_successful, is_ascii_pattern, is_ascii_input; int total = 0; @@ -889,7 +890,14 @@ static int regression_tests(void) utf or ucp may make tests fail, if the pcre_exec result is the SAME, it is still considered successful from pcre_jit_test point of view. */ - printf("Running JIT regression\n"); +#ifdef SUPPORT_PCRE8 + pcre_config(PCRE_CONFIG_JITTARGET, &cpu_info); +#else + pcre16_config(PCRE_CONFIG_JITTARGET, &cpu_info); +#endif + + printf("Running JIT regression tests\n"); + printf(" target CPU of SLJIT compiler: %s\n", cpu_info); #ifdef SUPPORT_PCRE8 pcre_config(PCRE_CONFIG_UTF8, &utf8); @@ -898,7 +906,7 @@ static int regression_tests(void) disabled_flags8 |= PCRE_UTF8; if (!ucp8) disabled_flags8 |= PCRE_UCP; - printf(" in 8 bit mode with utf8 %s and ucp %s:\n", utf8 ? "enabled" : "disabled", ucp8 ? "enabled" : "disabled"); + printf(" in 8 bit mode with utf8 %s and ucp %s:\n", utf8 ? "enabled" : "disabled", ucp8 ? "enabled" : "disabled"); #endif #ifdef SUPPORT_PCRE16 pcre16_config(PCRE_CONFIG_UTF16, &utf16); @@ -907,7 +915,7 @@ static int regression_tests(void) disabled_flags16 |= PCRE_UTF8; if (!ucp16) disabled_flags16 |= PCRE_UCP; - printf(" in 16 bit mode with utf16 %s and ucp %s:\n", utf16 ? "enabled" : "disabled", ucp16 ? "enabled" : "disabled"); + printf(" in 16 bit mode with utf16 %s and ucp %s:\n", utf16 ? "enabled" : "disabled", ucp16 ? "enabled" : "disabled"); #endif while (current->pattern) { diff --git a/sljit/sljitLir.c b/sljit/sljitLir.c index c2a636b..c1fa5e4 100644 --- a/sljit/sljitLir.c +++ b/sljit/sljitLir.c @@ -1153,6 +1153,32 @@ static SLJIT_INLINE int emit_mov_before_return(struct sljit_compiler *compiler, return sljit_emit_op1(compiler, op, SLJIT_RETURN_REG, 0, src, srcw); } +/* CPU description section */ + +#if (defined SLJIT_32BIT_ARCHITECTURE && SLJIT_32BIT_ARCHITECTURE) +#define SLJIT_CPUINFO_PART1 " 32bit (" +#elif (defined SLJIT_64BIT_ARCHITECTURE && SLJIT_64BIT_ARCHITECTURE) +#define SLJIT_CPUINFO_PART1 " 64bit (" +#else +#error "Internal error: CPU type info missing" +#endif + +#if (defined SLJIT_LITTLE_ENDIAN && SLJIT_LITTLE_ENDIAN) +#define SLJIT_CPUINFO_PART2 "little endian + " +#elif (defined SLJIT_BIG_ENDIAN && SLJIT_BIG_ENDIAN) +#define SLJIT_CPUINFO_PART2 "big endian + " +#else +#error "Internal error: CPU type info missing" +#endif + +#if (defined SLJIT_UNALIGNED && SLJIT_UNALIGNED) +#define SLJIT_CPUINFO_PART3 "unaligned)" +#else +#define SLJIT_CPUINFO_PART3 "aligned)" +#endif + +#define SLJIT_CPUINFO SLJIT_CPUINFO_PART1 SLJIT_CPUINFO_PART2 SLJIT_CPUINFO_PART3 + #if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32) #include "sljitNativeX86_common.c" #elif (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64) diff --git a/sljit/sljitNativeARM_Thumb2.c b/sljit/sljitNativeARM_Thumb2.c index 5455ce6..a51536b 100644 --- a/sljit/sljitNativeARM_Thumb2.c +++ b/sljit/sljitNativeARM_Thumb2.c @@ -26,7 +26,7 @@ SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name() { - return "arm-thumb2"; + return "ARM-Thumb2" SLJIT_CPUINFO; } /* Last register + 1. */ diff --git a/sljit/sljitNativeARM_v5.c b/sljit/sljitNativeARM_v5.c index 63bc6ee..e3a5873 100644 --- a/sljit/sljitNativeARM_v5.c +++ b/sljit/sljitNativeARM_v5.c @@ -27,9 +27,9 @@ SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name() { #if (defined SLJIT_CONFIG_ARM_V7 && SLJIT_CONFIG_ARM_V7) - return "arm-v7"; + return "ARMv7" SLJIT_CPUINFO; #elif (defined SLJIT_CONFIG_ARM_V5 && SLJIT_CONFIG_ARM_V5) - return "arm-v5"; + return "ARMv5" SLJIT_CPUINFO; #else #error "Internal error: Unknown ARM architecture" #endif diff --git a/sljit/sljitNativeMIPS_common.c b/sljit/sljitNativeMIPS_common.c index 0358585..3c6ee66 100644 --- a/sljit/sljitNativeMIPS_common.c +++ b/sljit/sljitNativeMIPS_common.c @@ -26,11 +26,7 @@ SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name() { -#if (defined SLJIT_CONFIG_MIPS_32 && SLJIT_CONFIG_MIPS_32) - return "mips-32"; -#else -#error "mips-64 is not yet supported" -#endif + return "MIPS" SLJIT_CPUINFO; } /* Latest MIPS architecture. */ diff --git a/sljit/sljitNativePPC_common.c b/sljit/sljitNativePPC_common.c index b45b476..f0f191d 100644 --- a/sljit/sljitNativePPC_common.c +++ b/sljit/sljitNativePPC_common.c @@ -26,11 +26,7 @@ SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name() { -#if (defined SLJIT_CONFIG_PPC_32 && SLJIT_CONFIG_PPC_32) - return "ppc-32"; -#else - return "ppc-64"; -#endif + return "PowerPC" SLJIT_CPUINFO; } /* Length of an instruction word. diff --git a/sljit/sljitNativeX86_common.c b/sljit/sljitNativeX86_common.c index 9df4f4e..1ed9649 100644 --- a/sljit/sljitNativeX86_common.c +++ b/sljit/sljitNativeX86_common.c @@ -26,11 +26,7 @@ SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name() { -#if (defined SLJIT_CONFIG_X86_32 && SLJIT_CONFIG_X86_32) - return "x86-32"; -#else - return "x86-64"; -#endif + return "x86" SLJIT_CPUINFO; } /* |