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author | zherczeg <zherczeg@2f5784b3-3f2a-0410-8824-cb99058d5e15> | 2017-08-01 08:29:13 +0000 |
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committer | zherczeg <zherczeg@2f5784b3-3f2a-0410-8824-cb99058d5e15> | 2017-08-01 08:29:13 +0000 |
commit | e5045fd31a2e171dff305665e2b921d7c93427b8 (patch) | |
tree | aebd59c8ef2f1f590d24b33aacdf993afe706dce | |
parent | 266c09f73f4f5a15eae5a47a8df2dd30ec71fb08 (diff) | |
download | pcre-e5045fd31a2e171dff305665e2b921d7c93427b8.tar.gz |
Minor JIT compiler update.
git-svn-id: svn://vcs.exim.org/pcre/code/trunk@1709 2f5784b3-3f2a-0410-8824-cb99058d5e15
-rw-r--r-- | ChangeLog | 6 | ||||
-rw-r--r-- | sljit/sljitLir.c | 8 | ||||
-rw-r--r-- | sljit/sljitLir.h | 10 | ||||
-rw-r--r-- | sljit/sljitNativeMIPS_common.c | 5 | ||||
-rw-r--r-- | sljit/sljitNativePPC_common.c | 13 |
5 files changed, 34 insertions, 8 deletions
@@ -4,6 +4,12 @@ ChangeLog for PCRE Note that the PCRE 8.xx series (PCRE1) is now in a bugfix-only state. All development is happening in the PCRE2 10.xx series. +Version 8.42 xx-xxx-2017 +------------------------ + +1. Fixed a MIPS issue in the JIT compiler reported by Joshua Kinard. + + Version 8.41 05-July-2017 ------------------------- diff --git a/sljit/sljitLir.c b/sljit/sljitLir.c index 66cdda3..c0bbb52 100644 --- a/sljit/sljitLir.c +++ b/sljit/sljitLir.c @@ -124,10 +124,10 @@ /* SLJIT_REWRITABLE_JUMP is 0x1000. */ #if (defined SLJIT_CONFIG_X86 && SLJIT_CONFIG_X86) -# define PATCH_MB 0x4 -# define PATCH_MW 0x8 +# define PATCH_MB 0x4 +# define PATCH_MW 0x8 #if (defined SLJIT_CONFIG_X86_64 && SLJIT_CONFIG_X86_64) -# define PATCH_MD 0x10 +# define PATCH_MD 0x10 #endif #endif @@ -1561,6 +1561,7 @@ static SLJIT_INLINE CHECK_RETURN_TYPE check_sljit_emit_cmov(struct sljit_compile CHECK_ARGUMENT(FUNCTION_CHECK_IS_REG(dst_reg & ~SLJIT_I32_OP)); if (src != SLJIT_IMM) { CHECK_ARGUMENT(FUNCTION_CHECK_IS_REG(src)); + CHECK_ARGUMENT(srcw == 0); } if ((type & 0xff) <= SLJIT_NOT_ZERO) @@ -1586,6 +1587,7 @@ static SLJIT_INLINE CHECK_RETURN_TYPE check_sljit_emit_cmov(struct sljit_compile static SLJIT_INLINE CHECK_RETURN_TYPE check_sljit_get_local_base(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw offset) { + /* Any offset is allowed. */ SLJIT_UNUSED_ARG(offset); #if (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS) diff --git a/sljit/sljitLir.h b/sljit/sljitLir.h index a58ad6e..470c84f 100644 --- a/sljit/sljitLir.h +++ b/sljit/sljitLir.h @@ -1225,7 +1225,15 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_cmov(struct sljit_compiler *compil sljit_s32 dst_reg, sljit_s32 src, sljit_sw srcw); -/* Copies the base address of SLJIT_SP + offset to dst. +/* Copies the base address of SLJIT_SP + offset to dst. The offset can be + anything to negate the effect of relative addressing. For example if an + array of sljit_sw values is stored on the stack from offset 0x40, and R0 + contains the offset of an array item plus 0x120, this item can be + overwritten by two SLJIT instructions: + + sljit_get_local_base(compiler, SLJIT_R1, 0, 0x40 - 0x120); + sljit_emit_op1(compiler, SLJIT_MOV, SLJIT_MEM2(SLJIT_R1, SLJIT_R0), 0, SLJIT_IMM, 0x5); + Flags: - (may destroy flags) */ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_get_local_base(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_sw offset); diff --git a/sljit/sljitNativeMIPS_common.c b/sljit/sljitNativeMIPS_common.c index ee207fe..00e8303 100644 --- a/sljit/sljitNativeMIPS_common.c +++ b/sljit/sljitNativeMIPS_common.c @@ -498,12 +498,13 @@ SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compil SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_has_cpu_feature(sljit_s32 feature_type) { + sljit_sw fir = 0; + switch (feature_type) { case SLJIT_HAS_FPU: #ifdef SLJIT_IS_FPU_AVAILABLE return SLJIT_IS_FPU_AVAILABLE; #elif defined(__GNUC__) - sljit_sw fir; asm ("cfc1 %0, $0" : "=r"(fir)); return (fir >> 22) & 0x1; #else @@ -517,7 +518,7 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_has_cpu_feature(sljit_s32 feature_type) #endif default: - return 0; + return fir; } } diff --git a/sljit/sljitNativePPC_common.c b/sljit/sljitNativePPC_common.c index e76deb7..2bf855c 100644 --- a/sljit/sljitNativePPC_common.c +++ b/sljit/sljitNativePPC_common.c @@ -760,7 +760,7 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_return(struct sljit_compiler *comp (((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg))) #endif -static const sljit_ins data_transfer_insts[64 + 8] = { +static const sljit_ins data_transfer_insts[64 + 16] = { /* -------- Unsigned -------- */ @@ -869,11 +869,20 @@ static const sljit_ins data_transfer_insts[64 + 8] = { /* d n x s */ HI(31) | LO(727) /* stfdx */, /* d n x l */ HI(31) | LO(599) /* lfdx */, +/* d w i s */ HI(55) /* stfdu */, +/* d w i l */ HI(51) /* lfdu */, +/* d w x s */ HI(31) | LO(759) /* stfdux */, +/* d w x l */ HI(31) | LO(631) /* lfdux */, + /* s n i s */ HI(52) /* stfs */, /* s n i l */ HI(48) /* lfs */, /* s n x s */ HI(31) | LO(663) /* stfsx */, /* s n x l */ HI(31) | LO(535) /* lfsx */, +/* s w i s */ HI(53) /* stfsu */, +/* s w i l */ HI(49) /* lfsu */, +/* s w x s */ HI(31) | LO(695) /* stfsux */, +/* s w x l */ HI(31) | LO(567) /* lfsux */, }; #undef ARCH_32_64 @@ -1753,7 +1762,7 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_custom(struct sljit_compiler *c /* Floating point operators */ /* --------------------------------------------------------------------- */ -#define FLOAT_DATA(op) (DOUBLE_DATA | ((op & SLJIT_F32_OP) >> 6)) +#define FLOAT_DATA(op) (DOUBLE_DATA | ((op & SLJIT_F32_OP) >> 5)) #define SELECT_FOP(op, single, double) ((op & SLJIT_F32_OP) ? single : double) #if (defined SLJIT_CONFIG_PPC_64 && SLJIT_CONFIG_PPC_64) |