summaryrefslogtreecommitdiff
path: root/sljit
diff options
context:
space:
mode:
authorzherczeg <zherczeg@2f5784b3-3f2a-0410-8824-cb99058d5e15>2012-07-12 10:10:51 +0000
committerzherczeg <zherczeg@2f5784b3-3f2a-0410-8824-cb99058d5e15>2012-07-12 10:10:51 +0000
commitc80a500ba428a79f44f15d3473f4709157525c54 (patch)
tree022ce977c4a46b9a1f0832b4e5804b959e5bbbc7 /sljit
parentba095a2a919748bd834177564bb0e31b68211499 (diff)
downloadpcre-c80a500ba428a79f44f15d3473f4709157525c54.tar.gz
Improved cache flush for AIX
git-svn-id: svn://vcs.exim.org/pcre/code/trunk@996 2f5784b3-3f2a-0410-8824-cb99058d5e15
Diffstat (limited to 'sljit')
-rw-r--r--sljit/sljitConfigInternal.h4
-rw-r--r--sljit/sljitNativePPC_common.c15
2 files changed, 13 insertions, 6 deletions
diff --git a/sljit/sljitConfigInternal.h b/sljit/sljitConfigInternal.h
index d69c177..7867f93 100644
--- a/sljit/sljitConfigInternal.h
+++ b/sljit/sljitConfigInternal.h
@@ -93,9 +93,9 @@
#else
#define SLJIT_CONFIG_ARM_V5 1
#endif
-#elif defined(__ppc64__) || defined(__powerpc64__) || defined(_ARCH_PPC64)
+#elif defined(__ppc64__) || defined(__powerpc64__) || defined(_ARCH_PPC64) || (defined(_AIX) && defined(__64BIT__))
#define SLJIT_CONFIG_PPC_64 1
-#elif defined(__ppc__) || defined(__powerpc__) || defined(_ARCH_PPC) || defined(_POWER)
+#elif defined(__ppc__) || defined(__powerpc__) || defined(_ARCH_PPC) || defined(_AIX)
#define SLJIT_CONFIG_PPC_32 1
#elif defined(__mips__)
#define SLJIT_CONFIG_MIPS_32 1
diff --git a/sljit/sljitNativePPC_common.c b/sljit/sljitNativePPC_common.c
index 6150a03..2f1a8ce 100644
--- a/sljit/sljitNativePPC_common.c
+++ b/sljit/sljitNativePPC_common.c
@@ -33,25 +33,32 @@ SLJIT_API_FUNC_ATTRIBUTE SLJIT_CONST char* sljit_get_platform_name()
Both for ppc-32 and ppc-64. */
typedef sljit_ui sljit_ins;
+#ifdef _AIX
+#include <sys/cache.h>
+#endif
+
static void ppc_cache_flush(sljit_ins *from, sljit_ins *to)
{
+#ifdef _AIX
+ _sync_cache_range((caddr_t)from, (size_t)(to - from) * sizeof(sljit_ins));
+#else
while (from < to) {
#if defined(__GNUC__) || (defined(__IBM_GCC_ASM) && __IBM_GCC_ASM)
-#ifdef _POWER
- __asm__ volatile ( "clf 0, %0" : : "r"(from) );
-#else
__asm__ volatile ( "icbi 0, %0" : : "r"(from) );
-#endif
#ifdef __xlc__
#warning "This file may fail to compile if -qfuncsect is used"
#endif
#elif defined(__xlc__)
#error "Please enable GCC syntax for inline assembly statements with -qasm=gcc"
#else
+ /* Power equivalent of icbi, not used yet. */
+ /* __asm__ volatile ( "clf 0, %0" : : "r"(from) ); */
+
#error "This platform requires a cache flush implementation."
#endif
from++;
}
+#endif /* _AIX */
}
#define TMP_REG1 (SLJIT_NO_REGISTERS + 1)