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author | Siarhei Siamashka <siarhei.siamashka@nokia.com> | 2010-11-02 22:53:55 +0200 |
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committer | Søren Sandmann Pedersen <ssp@redhat.com> | 2011-01-19 08:08:31 -0500 |
commit | e6ec404781b0cc34fe07823e419595821ae0ad1c (patch) | |
tree | bae0740602748fcf7d88c9b4bc5bb5076a194241 | |
parent | 2edec481b9582f6f593310af5fd4b713005028a5 (diff) | |
download | pixman-e6ec404781b0cc34fe07823e419595821ae0ad1c.tar.gz |
ARM: fix 'vld1.8'->'vld1.32' typo in add_8888_8888 NEON fast path
This was mostly harmless and had no effect on little endian systems.
But wrong vector element size is at least inconsistent and also
can theoretically cause problems on big endian ARM systems.
-rw-r--r-- | pixman/pixman-arm-neon-asm.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/pixman/pixman-arm-neon-asm.S b/pixman/pixman-arm-neon-asm.S index e4db5cd..87b8045 100644 --- a/pixman/pixman-arm-neon-asm.S +++ b/pixman/pixman-arm-neon-asm.S @@ -537,13 +537,13 @@ generate_composite_function \ /******************************************************************************/ .macro pixman_composite_add_8888_8888_process_pixblock_tail_head - vld1.8 {d0, d1, d2, d3}, [SRC]! + vld1.32 {d0, d1, d2, d3}, [SRC]! PF add PF_X, PF_X, #8 PF tst PF_CTL, #0xF - vld1.8 {d4, d5, d6, d7}, [DST_R, :128]! + vld1.32 {d4, d5, d6, d7}, [DST_R, :128]! PF addne PF_X, PF_X, #8 PF subne PF_CTL, PF_CTL, #1 - vst1.8 {d28, d29, d30, d31}, [DST_W, :128]! + vst1.32 {d28, d29, d30, d31}, [DST_W, :128]! PF cmp PF_X, ORIG_W PF pld, [PF_SRC, PF_X, lsl #src_bpp_shift] PF pld, [PF_DST, PF_X, lsl #dst_bpp_shift] |