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| author | Tushar Gohad <tushar.gohad@intel.com> | 2015-03-04 21:44:55 -0700 |
|---|---|---|
| committer | Tushar Gohad <tushar.gohad@intel.com> | 2015-03-04 21:45:24 -0700 |
| commit | 6f79145b908295dd9e94ad4dc2dd152d56611bed (patch) | |
| tree | 05ff4eb7c722bbc94a7d8e7953fd218a7a438dd5 | |
| parent | 51a7e06cf4534b3750516cce732373d807968db1 (diff) | |
| download | pyeclib-6f79145b908295dd9e94ad4dc2dd152d56611bed.tar.gz | |
Update README with flat_xor_hd_X types, references
Signed-off-by: Tushar Gohad <tushar.gohad@intel.com>
| -rw-r--r-- | README | 21 |
1 files changed, 17 insertions, 4 deletions
@@ -38,10 +38,10 @@ PyEClib initialization:: Supported ``ec_type`` values: - * ``jerasure_rs_vand`` => Vandermonde Reed-Solomon encoding - * ``jerasure_rs_cauchy`` => Cauchy Reed-Solomon encoding (Jerasure variant) - * ``flat_xor_hd`` => Flat-XOR based HD combination codes - * ``isa_l_rs_vand`` => SIMD-based Reed-Soloman implementation from ISA-L (Intel(R) Storage Acceleration Library) + * ``jerasure_rs_vand`` => Vandermonde Reed-Solomon encoding, based on Jerasure [1] + * ``jerasure_rs_cauchy`` => Cauchy Reed-Solomon encoding (Jerasure variant), based on Jerasure [2] + * ``flat_xor_hd_3``, ``flat_xor_hd_4`` => Flat-XOR based HD combination codes, liberasurecode [3] + * ``isa_l_rs_vand`` => Intel Storage Acceleration Library (ISA-L) - SIMD accelerated Erasure Coding backends [4] * ``shss`` => NTT Lab Japan's Erasure Coding Library A configuration utility is provided to help compare available EC schemes in @@ -147,5 +147,18 @@ Quick Start: $ ldconfig + +References + + [1] Jerasure, C library that supports erasure coding in storage applications, http://jerasure.org + + [2] Greenan, Kevin M et al, "Flat XOR-based erasure codes in storage systems", http://www.kaymgee.com/Kevin_Greenan/Publications_files/greenan-msst10.pdf + + [3] liberasurecode, C API abstraction layer for erasure coding backends, https://bitbucket.org/tsg-/liberasurecode + + [4] Intel(R) Storage Acceleration Library (Open Source Version), https://01.org/intel%C2%AE-storage-acceleration-library-open-source-version + + [5] Kota Tsuyuzaki <tsuyuzaki.kota@lab.ntt.co.jp>, Ryuta Kon <kon.ryuta@po.ntts.co.jp>, "NTT SHSS Erasure Coding backend" + -- 0.10 |