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* Copyright year update.Georg Brandl2015-01-211-1/+1
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* Closes #1057: adjust lexer analysis functions; remove too broad analysis for ↵Georg Brandl2014-11-091-4/+0
| | | | SystemVerilog and strengthen C.
* Simplify charclasses in a few more modulesGeorg Brandl2014-11-061-5/+5
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* Protobuf: be conciliatory after keywords, they might be used as identifiersGeorg Brandl2014-11-061-0/+1
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* HDL: use words()Georg Brandl2014-11-061-112/+136
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* VHDL: fix comment regex; two hyphens always start a commentGeorg Brandl2014-11-061-1/+1
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* HDL: PEP8 cleanupGeorg Brandl2014-11-061-17/+16
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* Add token type Number.BinDavid Corbett2014-05-191-5/+4
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* Overlap due to case insensitive modeGaurav Jain2014-05-151-10/+10
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* Replace all occurences of a-zA-Z0-9_ with \wGaurav Jain2014-05-141-3/+3
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* Replace all occurences of [a-zA-Z0-9_] with \wGaurav Jain2014-05-141-14/+14
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* use versionadded directivesGeorg Brandl2014-01-191-3/+3
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* new year in copyright noticeGeorg Brandl2014-01-101-1/+1
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* Added and to systemverilog lexer.Aditya Shevade2013-11-091-3/+3
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* added language full name in aliases for systemverilog+verilog in lexers/hdl.pyVitaliy Lotorev2013-01-111-2/+2
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* Happy new year 2013.Georg Brandl2013-01-091-1/+1
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* Move verilog package/import up in match orderTim Hatch2012-03-091-5/+3
| | | | | | | Lines that have leading whitespace should now match correctly. --- pygments/lexers/hdl.py | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)
* Fix a bunch of minor issues noticed by regexlintTim Hatch2012-03-091-2/+3
| | | | | | | | | | | | | --- pygments/lexers/agile.py | 8 ++++---- pygments/lexers/dotnet.py | 8 ++++---- pygments/lexers/functional.py | 5 ++++- pygments/lexers/hdl.py | 5 +++-- pygments/lexers/other.py | 2 +- pygments/lexers/templates.py | 31 ++++++++++++++++--------------- pygments/lexers/text.py | 4 ++-- pygments/lexers/web.py | 6 +++--- 8 files changed, 37 insertions(+), 32 deletions(-)
* Merge pygments-main with pygments-timTim Hatch2012-02-271-15/+15
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| * Bulk changes to improve many lexers inner workingsTim Hatch2011-03-191-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on a suspicion that most examplefiles only exercise a small part of the lexers, I've written some code to find suspicious parts of regular expressions, then gone back over those to fix them. Most of these affect whether the regex does what it looks like it does, but none of them should appreciably change the function of the lexer. * a few cases which used capturing groups + bygroups incorrectly (most were harmless, but I think one could have generated a traceback in its previous state) * a few cases which could match empty string, without a callback (this is highly discouraged, because if an op doesn't consume any characters, it might be possible to enter an empty loop). I'll revisit individually the cases where a callback or state push is used. * many cases with embedded newlines in non-verbose regexes * many, many cases with reversed (else|elseif) style alternations
* | Add changelog entry for vhdl.Georg Brandl2012-02-081-8/+16
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* | Merge with birkenfeld/pygments-mainIgor Kalnitsky2012-02-071-8/+144
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| * | Copyright update.Georg Brandl2012-02-051-1/+1
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| * | Closes #734: support the Coq theorem prover.Georg Brandl2012-02-051-0/+4
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| * | Changelog entry for SystemVerilog.Georg Brandl2012-02-041-8/+7
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| * | Added new SystemVerilog lexer to hdl.py. Fixed integer typo in Verilog ↵Gordon McGregor2011-10-041-3/+135
| |/ | | | | | | lexer. Added *.sv|*.svh filetypes for systemverilog lexer and downgraded verilog lexer to just *.v files
* | Fix some bugs in VHDL Lexer.Igor Kalnitsky2012-02-071-3/+4
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* | Added VHDL Lexer.Igor Kalnitsky2012-01-221-2/+79
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* 491: add Verilog lexerthatch2010-05-051-0/+135
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