diff options
author | Chris Liechti <cliechti@gmx.net> | 2018-05-08 03:39:20 +0200 |
---|---|---|
committer | Chris Liechti <cliechti@gmx.net> | 2018-05-08 03:39:20 +0200 |
commit | 22d3900706df7a9c3846094f04dde830553e1a7c (patch) | |
tree | 7c18aa7d35c5c2ff41b39542024e90307df54c58 | |
parent | 8e45873bd66c9270d292d87eb58b54b066a896bc (diff) | |
download | pyserial-git-22d3900706df7a9c3846094f04dde830553e1a7c.tar.gz |
docs: add notes for readline, readlines, writelines, IOBase
see #285
-rw-r--r-- | documentation/pyserial_api.rst | 17 | ||||
-rw-r--r-- | serial/serialposix.py | 3 |
2 files changed, 18 insertions, 2 deletions
diff --git a/documentation/pyserial_api.rst b/documentation/pyserial_api.rst index 545f948..2045244 100644 --- a/documentation/pyserial_api.rst +++ b/documentation/pyserial_api.rst @@ -465,6 +465,18 @@ Native ports .. versionadded:: 2.5 + .. method:: readline(size=-1) + + Provided via :meth:`io.IOBase.readline` + + .. method:: readlines(hint=-1) + + Provided via :meth:`io.IOBase.readlines` + + .. method:: writelines(lines) + + Provided via :meth:`io.IOBase.writelines` + The port settings can be read and written as dictionary. The following keys are supported: ``write_timeout``, ``inter_byte_timeout``, ``dsrdtr``, ``baudrate``, ``timeout``, ``parity``, ``bytesize``, @@ -706,8 +718,9 @@ Native ports Implementation detail: some attributes and functions are provided by the -class :class:`SerialBase` and some by the platform specific class and -others by the base class mentioned above. +class :class:`serial.SerialBase` which inherits from :class:`io.RawIOBase` +and some by the platform specific class and others by the base class +mentioned above. RS485 support diff --git a/serial/serialposix.py b/serial/serialposix.py index 9eec8a7..507e2fe 100644 --- a/serial/serialposix.py +++ b/serial/serialposix.py @@ -789,6 +789,9 @@ class VTIMESerial(Serial): the error handling is degraded. Overall timeout is disabled when inter-character timeout is used. + + Note that this implementation does NOT support cancel_read(), it will + just ignore that. """ def _reconfigure_port(self, force_update=True): |