| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Piotr Król <piotr.krol@3mdeb.com>
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virtio-pci calls pci_enable_{io,mem}bar with the bar number,
but the functions expect the bar base register offset.
Reported-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Move checking for extended scancodes and key release to the top of
__process_key().
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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int 0x05 was not assigned in the interrupt table - fix that.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Generate the appropriate interrupt events for the given keys.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Detect the sequences for generating Ctrl+Break and Alt+SysReq on USB
keyboards and produce the appropriate legacy scancodes.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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AT keyboards can produce "fake" shift keys on some extended events.
It's not necessary to process these artificial events as the actual
extended keys are detected directly.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Merge the two consecutive u8 fields into a single u16 field.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Don't warn if a key without a mapping is pressed - it's known that
some keys aren't mapped to keycodes. Suppress these keys instead of
sending 0x0000 to the keyboard buffer - as 0x0000 can confuse some
programs.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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On a 101-key keyboard the keypad enter and keypad '/' keys have unique
BIOS keycodes that are distinct from the main keyboard enter and '/'
keys.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The current keyboard code only supports the keycode mappings for
83-key keyboards (plus handling for alt-esc and f11/f12). Add a more
complete mapping of keycodes for 101-key keyboards. This adds more
alt key and ctrl key mappings.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Hardware interrupt handlers don't take a parameter. Remove the
incorrect (and unused) parameter from handle_hwpic1/2().
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Commit 4ce5d207 removed the code to wait for a possible second byte
from a keyboard reset command, but it did not remove the extra check
when warning in ps2_recvbyte(). Remove the now stale code in
ps2_recvbyte().
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Modify the function that writes the TPM logs to take the same digest
passed to tpm_extend. Update the tpm2 acpi log header to describe the
digest format.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Extend the tpm20_extend function to support extending a hash to
multiple PCR banks. The sha1 hash that's being extended into the
sha256 bank for example, will be filled with zero-bytes to the
size of a sha256 hash.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Refactor the tpml_digest_values_sha1 structure so we can later cast it
to the more general tpml_digest_values structure. Move the count member
into this structure.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
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Restructure the tpm20_extend function to use a buffer for the
command to send to the TPM. The size of the buffer is calculated
from the size of tpm2_req_extend structure and the appended SHA1
hash.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
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Implement tpm20_get_capability and retrieve the PCR Bank configuration
from the TPM using this function.
Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
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Recent versions of gcc will sometimes place conditional checks in the
code prior to setting up the function's stack frame. Handle this case
correctly.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Avoid using the scarce ZoneLow memory.
This limits max number of pvscsi controllers.
As driver runs in 32bit mode, use ZoneHigh allocation instead.
Signed-off-by: Dana Rubin <dana.rubin@ravellosystems.com>
Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
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First argument should be 'align' and second 'size'.
Signed-off-by: <dana.rubin@ravellosystems.com>
Signed-off-by: <shmulik.ladkani@ravellosystems.com>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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These files only need to export simple function definitions - move
them to vgautil.h.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Don't use stdvga.h for function definitions of code in stdvgamodes.c
and stdvgaio.c. Move them to vgautil.h.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Move the generic function and variable definitions from vgabios.h to a
new file vgautil.h. This reduces the size and complexity of
vgabios.h.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Move the full video_param_table[] setup (including the updating of the
BDA) to stdvga_build_video_param().
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The software cursor code is not frequently used (only the coreboot
framebuffer vga code uses it). Move its logic out of the main code
and into swcursor.c.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Reduce the size of the 16bit code slightly by recognizing that
CMD_SCSI is only used in 32bit mode.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Introduce a new function vgafb_scroll() to scroll a window on the
screen and update vgabios.c to use only that function for scrolling.
This makes the low-level vgafb_move_chars() and vgafb_clear_chars()
local to vgafb.c, and it simplifies the callers.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Currently the MTRRs and MSR_IA32_FEATURE_CONTROL are not restored on S3
resume. Because these have to be applied to all processors, SMP setup
has to be added to S3 resume.
There are two differences between the boot and resume paths. First,
romfile_* is not usable in the resume paths so we separate out the
remaining common code to a new smp_scan function. Second, smp_msr has
to be walked on the BSP as well, so we extract that out of handle_smp
and into a new function smp_write_msrs. Then, resume can call
smp_write_msrs on the BSP followed by smp_scan to initialize the APs.
Reported-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Rework set_cursor_pos() to be slightly simpler.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The original "lgpl vgabios" internally used page=0xff as a mechanism
for specifying the current page. It also would allow int1013 calls to
externally specify bh==0xff for the current page. However, there is
no documentation supporting this as an externally available feature.
SeaVGABIOS does not need the internal shortcut; this patch removes the
code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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The original "lgpl vgabios" had a special case for dh==0xff in its
int1013 (write string) code. There does not appear to be any VGABIOS
documentation supporting this as an externally available feature. It
appears this was for its own internal use when writing its strings to
the screen. SeaVGABIOS doesn't use this hack; this patch removes it
from the code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
"etc/msr_feature_control" to advise bits that should be set in
MSR_IA32_FEATURE_CONTROL. If this file exists, SeaBIOS will set the
advised bits in that MSR.
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 20160622065324.23812-1-haozhong.zhang@intel.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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virtio regions can also be accessed using a window in pci cfg space.
Add support for it. Enable it in case the virtio regions are mapped
high (above 4g), so direct mmio access doesn't work for us even in
32bit mode.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Next patch makes it larger, and I don't think it makes sense to
continue inlining it. Uninline and move from header to c file.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Current JPEG decoding uses the RGB888 or RGB565. So we need to skip
RGB555 mode.
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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QEMU provides two fw_cfg files to support IGD. The first holds the
OpRegion data which holds the Video BIOS Table (VBT). This needs to
be copied into reserved memory and the address stored in the ASL
Storage register of the device at 0xFC offset in PCI config space.
The OpRegion is generally 8KB. This file is named "etc/igd-opregion".
The second file tells us the required size of the stolen memory space
for the device. This space requires 1MB alignment and is generally
either 1MB to 8MB depending on hardware config, but may be hundreds of
MB for user specified stolen memory. The base address of the reserved
memory allocated for this is written back to the Base Data of Stolen
Memory register (BDSM) at PCI config offset 0x5C on the device. This
file is named "etc/igd-bdsm-size".
QEMU documents these fw_cfg entries in docs/igd-assign.txt.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Message-id: 20160517203151.6996.95545.stgit@gimli.home
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Remove the unused array `PhysicalPresence_CMD_DISABLE` to fix GCC 6
warnings.
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Remove the unused arrays `eptype_to_xhci_in` and `eptype_to_xhci_out` to
fix GCC 6 warnings.
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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Enabling and disabling shadow ram on QEMU is slow. Batch the PCI
writes to reduce the number of memory changes QEMU must implement.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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No modern software uses this option and it complicates the code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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