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authorWANG Xuerui <git@xen0n.name>2021-08-10 00:11:17 +0800
committerWANG Xuerui <git@xen0n.name>2022-01-13 19:43:15 +0800
commit819a2c5ff74e8fd957d36ae1e70cb87f02d2b9b6 (patch)
treeeb9306281adba4504ff016ae25e95e8855bfdedd
parent6efe7d7dc3e105a1ea19042f6b212b3366e4fd13 (diff)
downloadstrace-819a2c5ff74e8fd957d36ae1e70cb87f02d2b9b6.tar.gz
Add 64-bit LoongArch support
This is based on the WIP Linux port still under review, but the port is re-using asm-generic syscall numbers and parameters, so breakage should be minimal when the port is eventually merged, if at all. Currently only the LP64* ABIs are implemented in the toolchains, so only support the host type "loongarch64". * NEWS: Mention this. * configure.ac [$host_cpu == loongarch64]: Define LOONGARCH64. * src/linux/loongarch64/arch_defs_.h: New file. * src/linux/loongarch64/arch_regs.c: Likewise. * src/linux/loongarch64/get_error.c: Likewise. * src/linux/loongarch64/get_scno.c: Likewise. * src/linux/loongarch64/get_syscall_args.c: Likewise. * src/linux/loongarch64/ioctls_arch0.h: Likewise. * src/linux/loongarch64/ioctls_inc0.h: Likewise. * src/linux/loongarch64/raw_syscall.h: Likewise. * src/linux/loongarch64/set_error.c: Likewise. * src/linux/loongarch64/set_scno.c: Likewise. * src/linux/loongarch64/syscallent.h: Likewise. * src/Makefile.am (EXTRA_DIST): Add them. * src/xlat/elf_em.in: Add EM_LOONGARCH. Link: https://lore.kernel.org/lkml/20211013063656.3084555-1-chenhuacai@loongson.cn/
-rw-r--r--NEWS1
-rw-r--r--configure.ac5
-rw-r--r--src/Makefile.am11
-rw-r--r--src/linux/loongarch64/arch_defs_.h8
-rw-r--r--src/linux/loongarch64/arch_regs.c11
-rw-r--r--src/linux/loongarch64/get_error.c19
-rw-r--r--src/linux/loongarch64/get_scno.c14
-rw-r--r--src/linux/loongarch64/get_syscall_args.c19
-rw-r--r--src/linux/loongarch64/ioctls_arch0.h1
-rw-r--r--src/linux/loongarch64/ioctls_inc0.h1
-rw-r--r--src/linux/loongarch64/raw_syscall.h29
-rw-r--r--src/linux/loongarch64/set_error.c20
-rw-r--r--src/linux/loongarch64/set_scno.c15
-rw-r--r--src/linux/loongarch64/syscallent.h8
-rw-r--r--src/xlat/elf_em.in1
15 files changed, 163 insertions, 0 deletions
diff --git a/NEWS b/NEWS
index ee3acafe2..4a34d98c1 100644
--- a/NEWS
+++ b/NEWS
@@ -2,6 +2,7 @@ Noteworthy changes in release ?.?? (????-??-??)
===============================================
* Improvements
+ * Added 64-bit LoongArch architecture support.
* Bug fixes
diff --git a/configure.ac b/configure.ac
index 27a547ef9..d17ba04a7 100644
--- a/configure.ac
+++ b/configure.ac
@@ -115,6 +115,11 @@ ia64)
arch=ia64
AC_DEFINE([IA64], 1, [Define for the IA64 architecture.])
;;
+loongarch64)
+ arch=loongarch64
+ karch=loongarch
+ AC_DEFINE([LOONGARCH64], 1, [Define for the 64-bit LoongArch architecture.])
+ ;;
m68k)
arch=m68k
AC_DEFINE([M68K], 1, [Define for the m68k architecture.])
diff --git a/src/Makefile.am b/src/Makefile.am
index d61696ec0..4344a1ce2 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -646,6 +646,17 @@ EXTRA_DIST = \
linux/ia64/syscallent.h \
linux/ia64/syscallent_base_nr.h \
linux/ia64/userent.h \
+ linux/loongarch64/arch_defs_.h \
+ linux/loongarch64/arch_regs.c \
+ linux/loongarch64/get_error.c \
+ linux/loongarch64/get_scno.c \
+ linux/loongarch64/get_syscall_args.c \
+ linux/loongarch64/ioctls_arch0.h \
+ linux/loongarch64/ioctls_inc0.h \
+ linux/loongarch64/raw_syscall.h \
+ linux/loongarch64/set_error.c \
+ linux/loongarch64/set_scno.c \
+ linux/loongarch64/syscallent.h \
linux/m68k/arch_defs_.h \
linux/m68k/arch_regs.c \
linux/m68k/arch_rt_sigframe.c \
diff --git a/src/linux/loongarch64/arch_defs_.h b/src/linux/loongarch64/arch_defs_.h
new file mode 100644
index 000000000..ffb573326
--- /dev/null
+++ b/src/linux/loongarch64/arch_defs_.h
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2021-2022 The strace developers.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#define PERSONALITY0_AUDIT_ARCH { AUDIT_ARCH_LOONGARCH64, 0 }
diff --git a/src/linux/loongarch64/arch_regs.c b/src/linux/loongarch64/arch_regs.c
new file mode 100644
index 000000000..509ac8e4f
--- /dev/null
+++ b/src/linux/loongarch64/arch_regs.c
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2021-2022 The strace developers.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+static struct user_pt_regs loongarch_regs;
+#define ARCH_REGS_FOR_GETREGSET loongarch_regs
+#define ARCH_PC_REG loongarch_regs.csr_era
+#define ARCH_SP_REG loongarch_regs.regs[3]
diff --git a/src/linux/loongarch64/get_error.c b/src/linux/loongarch64/get_error.c
new file mode 100644
index 000000000..b52ae28fb
--- /dev/null
+++ b/src/linux/loongarch64/get_error.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2021-2022 The strace developers.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "negated_errno.h"
+
+static void
+arch_get_error(struct tcb *tcp, const bool check_errno)
+{
+ if (check_errno && is_negated_errno(loongarch_regs.regs[4])) {
+ tcp->u_rval = -1;
+ tcp->u_error = -loongarch_regs.regs[4];
+ } else {
+ tcp->u_rval = loongarch_regs.regs[4];
+ }
+}
diff --git a/src/linux/loongarch64/get_scno.c b/src/linux/loongarch64/get_scno.c
new file mode 100644
index 000000000..cb0f42cae
--- /dev/null
+++ b/src/linux/loongarch64/get_scno.c
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2021-2022 The strace developers.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+/* Return codes: 1 - ok, 0 - ignore, other - error. */
+static int
+arch_get_scno(struct tcb *tcp)
+{
+ tcp->scno = loongarch_regs.regs[11];
+ return 1;
+}
diff --git a/src/linux/loongarch64/get_syscall_args.c b/src/linux/loongarch64/get_syscall_args.c
new file mode 100644
index 000000000..43831688f
--- /dev/null
+++ b/src/linux/loongarch64/get_syscall_args.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2021-2022 The strace developers.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+/* Return -1 on error or 1 on success (never 0!). */
+static int
+arch_get_syscall_args(struct tcb *tcp)
+{
+ tcp->u_arg[0] = loongarch_regs.regs[4];
+ tcp->u_arg[1] = loongarch_regs.regs[5];
+ tcp->u_arg[2] = loongarch_regs.regs[6];
+ tcp->u_arg[3] = loongarch_regs.regs[7];
+ tcp->u_arg[4] = loongarch_regs.regs[8];
+ tcp->u_arg[5] = loongarch_regs.regs[9];
+ return 1;
+}
diff --git a/src/linux/loongarch64/ioctls_arch0.h b/src/linux/loongarch64/ioctls_arch0.h
new file mode 100644
index 000000000..59d8aaa9a
--- /dev/null
+++ b/src/linux/loongarch64/ioctls_arch0.h
@@ -0,0 +1 @@
+/* Generated by ioctls_gen.sh from definitions found in $linux/arch/loongarch/include/ tree. */
diff --git a/src/linux/loongarch64/ioctls_inc0.h b/src/linux/loongarch64/ioctls_inc0.h
new file mode 100644
index 000000000..6028afbe4
--- /dev/null
+++ b/src/linux/loongarch64/ioctls_inc0.h
@@ -0,0 +1 @@
+#include "../64/ioctls_inc.h"
diff --git a/src/linux/loongarch64/raw_syscall.h b/src/linux/loongarch64/raw_syscall.h
new file mode 100644
index 000000000..122777898
--- /dev/null
+++ b/src/linux/loongarch64/raw_syscall.h
@@ -0,0 +1,29 @@
+/*
+ * Raw syscalls.
+ *
+ * Copyright (c) 2021-2022 The strace developers.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#ifndef STRACE_RAW_SYSCALL_H
+# define STRACE_RAW_SYSCALL_H
+
+# include "kernel_types.h"
+
+static inline kernel_ulong_t
+raw_syscall_0(const kernel_ulong_t nr, kernel_ulong_t *err)
+{
+ *err = 0;
+ register kernel_ulong_t a7 __asm__("a7") = nr;
+ register kernel_ulong_t a0 __asm__("a0");
+ __asm__ __volatile__("syscall 0"
+ : "=r"(a0)
+ : "r"(a7)
+ : "memory");
+ return a0;
+}
+# define raw_syscall_0 raw_syscall_0
+
+#endif /* !STRACE_RAW_SYSCALL_H */
diff --git a/src/linux/loongarch64/set_error.c b/src/linux/loongarch64/set_error.c
new file mode 100644
index 000000000..aa83a3e02
--- /dev/null
+++ b/src/linux/loongarch64/set_error.c
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2021-2022 The strace developers.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+static int
+arch_set_error(struct tcb *tcp)
+{
+ loongarch_regs.regs[4] = -tcp->u_error;
+ return set_regs(tcp->pid);
+}
+
+static int
+arch_set_success(struct tcb *tcp)
+{
+ loongarch_regs.regs[4] = tcp->u_rval;
+ return set_regs(tcp->pid);
+}
diff --git a/src/linux/loongarch64/set_scno.c b/src/linux/loongarch64/set_scno.c
new file mode 100644
index 000000000..d338f2068
--- /dev/null
+++ b/src/linux/loongarch64/set_scno.c
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2021-2022 The strace developers.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+static int
+arch_set_scno(struct tcb *tcp, kernel_ulong_t scno)
+{
+ if (ptrace_syscall_info_is_valid() && get_regs(tcp) < 0)
+ return -1;
+ loongarch_regs.regs[11] = scno;
+ return set_regs(tcp->pid);
+}
diff --git a/src/linux/loongarch64/syscallent.h b/src/linux/loongarch64/syscallent.h
new file mode 100644
index 000000000..5ab228bfb
--- /dev/null
+++ b/src/linux/loongarch64/syscallent.h
@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2021-2022 The strace developers.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "../64/syscallent.h"
diff --git a/src/xlat/elf_em.in b/src/xlat/elf_em.in
index 116b18292..6d9bf80a0 100644
--- a/src/xlat/elf_em.in
+++ b/src/xlat/elf_em.in
@@ -190,6 +190,7 @@ EM_AMDGPU 224 /* AMD GPU architecture */
EM_RISCV 243 /* RISC-V */
EM_BPF 247 /* Linux BPF - in-kernel virtual machine */
EM_CSKY 252 /* C-SKY */
+EM_LOONGARCH 258 /* LoongArch */
EM_AVR32 0x18ad /* Atmel AVR32, removed in v4.12-rc1~159^2~5 */
EM_FRV 0x5441 /* Fujitsu FR-V */
EM_OR32 0x8472 /* arch/openrisc/include/uapi/asm/elf.h */