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authorLey Foon Tan <ley.foon.tan@intel.com>2020-11-02 15:37:11 +0800
committerLey Foon Tan <ley.foon.tan@intel.com>2020-11-20 16:39:21 +0800
commitccdd2dd28c759c2a40504eb0eab38cc6467e26ac (patch)
tree06d21f8907cdbb3fdb35aedef61582663686deb1 /.mailmap
parent48e6821921103b5a091ec672cc6ef9ffb53cb151 (diff)
downloadu-boot-socfpga-ccdd2dd28c759c2a40504eb0eab38cc6467e26ac.tar.gz
HSD: #1508430891-4: ddr: altera: soc64: Add secure region support for ATF flow
Setting up firewall regions based on SDRAM memory banks configuration (up to CONFIG_NR_DRAM_BANKS banks) instead of using whole address space. First 1 MiB (0 to 0xfffff) of SDRAM is configured as secure region, other address spaces are non-secure regions. The ARM Trusted Firmware (ATF) image is located in this first 1 MiB memory region. So, this can prevent software executing at non-secure state EL0-EL2 and non-secure masters access to secure region. Add common function for firewall setup and reuse for all SoC64 devices. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> --- v4: - Remove FW_MPU_DDR_SCR_READL() - Change to use struct bd_info in header file. v3: Change to use struct bd_info. v2: Rename sdram_set_fw() to sdram_set_firewall().
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