diff options
| author | Chin Liang See <chin.liang.see@intel.com> | 2017-11-13 18:16:00 +0800 |
|---|---|---|
| committer | Chin Liang See <chin.liang.see@intel.com> | 2017-11-16 17:16:38 +0800 |
| commit | 17db5346b50262fb7f5aadc92de92c6a43d30226 (patch) | |
| tree | c1723b5e92479b61730c96c72373cc7d8c88b2d6 | |
| parent | 3f589ee8f7380271f30efd1aca99db55afaa1d82 (diff) | |
| download | u-boot-socfpga-17db5346b50262fb7f5aadc92de92c6a43d30226.tar.gz | |
FogBugz #507879-3: arm: stratix10: Enable Linux QSPI controller supportrel_socfpga_v2017.09_17.11.02_pr
U-Boot will enable Linux QSPI controller support through
updating the Linux device tree blob. This include updating the
QSPI controller reference clock.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
| -rwxr-xr-x | arch/arm/mach-socfpga/misc_s10.c | 5 | ||||
| -rwxr-xr-x | include/configs/socfpga_stratix10_socdk.h | 10 |
2 files changed, 13 insertions, 2 deletions
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c index 0c809262cd..53605da91a 100755 --- a/arch/arm/mach-socfpga/misc_s10.c +++ b/arch/arm/mach-socfpga/misc_s10.c @@ -126,6 +126,11 @@ int print_cpuinfo(void) #ifdef CONFIG_ARCH_MISC_INIT int arch_misc_init(void) { + char qspi_string[13]; + + sprintf(qspi_string, "<0x%08x>", cm_get_qspi_controller_clk_hz()); + env_set("qspi_clock", qspi_string); + return socfpga_eth_reset(); } #endif diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index bd610ebef2..e44a81d419 100755 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -102,7 +102,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * Do note the value will overide also the chosen node in FDT blob. */ #define CONFIG_BOOTARGS "earlycon" -#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot" +#define CONFIG_BOOTCOMMAND "run mmcload; run linux_qspi_enable; run mmcboot" #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ @@ -115,7 +115,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void); "booti ${loadaddr} - ${fdt_addr}\0" \ "mmcload=mmc rescan;" \ "load mmc 0:1 ${loadaddr} ${bootfile};" \ - "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" + "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \ + "linux_qspi_enable=if sf probe; then " \ + "echo Enabling QSPI at Linux DTB...;" \ + "fdt addr ${fdt_addr}; fdt resize;" \ + "fdt set /soc/spi@ff8d2000 status okay;" \ + "fdt set /soc/clkmgr/clocks/qspi_clk clock-frequency " \ + " ${qspi_clock}; fi; \0" /* * Generic Interrupt Controller Definitions |