FogBugz #285044-3: Configure ksz9031 phy skews from uboot environmentrel_socfpga_v2014.10_arria10_bringup_gsrd_iesrel_socfpga_v2014.10_arria10_bringup_15.04.02_prrel_socfpga_v2014.10_arria10_bringup_15.04.01_pr

This patch configures the ksz9031 phy skew values from the UBoot environment
just like the ksz9021 phy on the C5 devkit.

Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>

3 files changed, 56 insertions, 0 deletions

diff --git a/board/altera/socfpga_arria10/socfpga_common.c b/board/altera/socfpga_arria10/socfpga_common.c
index f29d9030ac..6da497d19b 100755
--- a/board/altera/socfpga_arria10/socfpga_common.c
+++ b/board/altera/socfpga_arria10/socfpga_common.c
@@ -90,8 +90,52 @@ socfpga_get_phy_mode(ulong phymode)
 	return val;
 }
 
+int is_ksz9031(struct phy_device *phydev)
+{
+	unsigned short phyid1;
+	unsigned short phyid2;
+
+	phyid1 = phy_read(phydev, MDIO_DEVAD_NONE, MII_PHYSID1);
+	phyid2 = phy_read(phydev, MDIO_DEVAD_NONE, MII_PHYSID2);
+
+	phyid2 = phyid2 & MICREL_KSZ9031_PHYID2_REVISION_MASK;
+
+	debug("phyid1 %04x, phyid2 %04x\n", phyid1, phyid2);
+
+	if ((phyid1 == MICREL_KSZ9031_PHYID1) &&
+	    (phyid2 == MICREL_KSZ9031_PHYID2))
+		return 1;
+	return 0;
+}
+
+
+
 int board_phy_config(struct phy_device *phydev)
 {
+	if (is_ksz9031(phydev)) {
+		unsigned short reg4;
+		unsigned short reg5;
+		unsigned short reg6;
+		unsigned short reg8;
+
+		reg4 = getenv_ulong("ksz9031-rgmii-ctrl-skew", 16, 0x77);
+		reg5 = getenv_ulong("ksz9031-rgmii-rxd-skew", 16, 0x7777);
+		reg6 = getenv_ulong("ksz9031-rgmii-txd-skew", 16, 0x7777);
+		reg8 = getenv_ulong("ksz9031-rgmii-clock-skew", 16, 0x1ef);
+
+		ksz9031_phy_extended_write(phydev, 2, 4,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   reg4);
+		ksz9031_phy_extended_write(phydev, 2, 5,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   reg5);
+		ksz9031_phy_extended_write(phydev, 2, 6,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   reg6);
+		ksz9031_phy_extended_write(phydev, 2, 8,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   reg8);
+	}
 	if (phydev->drv->config)
 		phydev->drv->config(phydev);
 
diff --git a/include/configs/socfpga_arria10.h b/include/configs/socfpga_arria10.h
index 289d911b9a..5d11ccc6d4 100755
--- a/include/configs/socfpga_arria10.h
+++ b/include/configs/socfpga_arria10.h
@@ -265,6 +265,10 @@
 		"fpgabr 1;" \
 		"bootz ${loadaddr} - ${fdtaddr}\0" \
 	"bootcmd=" CONFIG_BOOTCOMMAND "\0" \
+	"ksz9031-rgmii-ctrl-skew=0x70\0" \
+	"ksz9031-rgmii-rxd-skew=0x7777\0" \
+	"ksz9031-rgmii-txd-skew=0x0\0" \
+	"ksz9031-rgmii-clock-skew=0x3fc\0" \
 	"fpga=0\0" \
 	"fpgadata=0x2000000\0" \
 	"fpgadatasize=0x700000\0" \
diff --git a/include/micrel.h b/include/micrel.h
index 04c9ecf3bf..5912ceeff1 100644
--- a/include/micrel.h
+++ b/include/micrel.h
@@ -20,6 +20,14 @@
 #define MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW	0x6
 #define MII_KSZ9031_EXT_RGMII_CLOCK_SKEW	0x8
 
+/* PHY IDs */
+#define MICREL_KSZ9031_PHYID1			0x0022
+
+/* Last nibble is the silicon version */
+#define MICREL_KSZ9031_PHYID2			0x1620
+
+#define MICREL_KSZ9031_PHYID2_REVISION_MASK	0xfff0
+
 struct phy_device;
 int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val);
 int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum);