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| author | Tien Fong Chee <tien.fong.chee@intel.com> | 2018-06-27 13:50:50 +0800 |
|---|---|---|
| committer | Tien Fong Chee <tien.fong.chee@intel.com> | 2018-06-27 13:50:50 +0800 |
| commit | 2791f93f1039136478069c9c9bc8d0e46eac27e8 (patch) | |
| tree | e12af2ff939c436677c9270b624ffe20410bc874 | |
| parent | c60a78e486f4727465287f13bec06ea9b9cf9889 (diff) | |
| download | u-boot-socfpga-2791f93f1039136478069c9c9bc8d0e46eac27e8.tar.gz | |
FogBugz #568246-2: Enable workaround to A10 for Cortex-A9 errata 845369rel_socfpga_v2014.10_arria10_bringup_18.07.02_prrel_socfpga_v2014.10_arria10_bringup_18.07.01_pr
Under very rare timing circumstances, transition into
streaming mode might create a data corruption. Exists on
all Cortex-A9 revisions.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
| -rwxr-xr-x | include/configs/socfpga_arria10.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/configs/socfpga_arria10.h b/include/configs/socfpga_arria10.h index b7f7963433..2bfb4fc486 100755 --- a/include/configs/socfpga_arria10.h +++ b/include/configs/socfpga_arria10.h @@ -53,6 +53,11 @@ /* Enable board late init for ECC setup if IRQ enabled */ #define CONFIG_BOARD_LATE_INIT +/* + * Errata configuration + */ +#define CONFIG_ARM_ERRATA_845369 + /* Cache options */ #define CONFIG_SYS_DCACHE_OFF #define CONFIG_CMD_CACHE |