diff options
| author | Thor Thayer <tthayer@altera.com> | 2018-09-13 08:44:17 -0700 |
|---|---|---|
| committer | Thor Thayer <thor.thayer@linux.intel.com> | 2018-09-14 16:07:22 -0500 |
| commit | e7c8e17f00d8ea59d8980d075b0e7f42644345c8 (patch) | |
| tree | af5042aae3d47a1cff944bcf7eb75774f6fc0880 | |
| parent | 214886628bd7847f3bced1816e319d50cbf23dec (diff) | |
| download | u-boot-socfpga-e7c8e17f00d8ea59d8980d075b0e7f42644345c8.tar.gz | |
FogBugz #592949-2: Take Stratix10 DMA ECC out of reset
Remove the DMA ECC block from reset so that Linux can access
the ECC registers.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/spl_s10.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h index dd75fcd7d4..da4019dba4 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h @@ -97,6 +97,7 @@ struct socfpga_reset_manager { #define RSTMGR_DMA RSTMGR_DEFINE(1, 16) #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17) #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18) +#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21) #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0) #define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1) #define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2) diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index 98a4c1f348..e3a42d910a 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -94,6 +94,7 @@ void board_init_f(ulong dummy) writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs->dma_periph); /* enable DMA330 DMA */ socfpga_per_reset(SOCFPGA_RESET(DMA), 0); + socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0); /* * The following lines of code will enable non-secure access |