HSD #1408910499: Additional support for RSU_NOTIFYrel_socfpga_v2017.09_19.07.02_prrel_socfpga_v2017.09_19.07.01_prrel_socfpga_v2017.09_19.06.02_pr

Add capability of calling SDM RSU_NOTIFY to U-Boot CLI and PSCI.

Signed-off-by: Bacrau, Radu <radu.bacrau@intel.com>

5 files changed, 60 insertions, 1 deletions

diff --git a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
index a68b0f167a..41c1dc2bab 100644
--- a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
@@ -168,6 +168,7 @@ int mbox_rsu_status_psci(u32 *resp_buf, u32 resp_buf_len);
 int mbox_rsu_update(u32 *flash_offset);
 int mbox_rsu_update_psci(u32 *flash_offset);
 int mbox_hps_stage_notify(u32 execution_stage);
+int mbox_hps_stage_notify_psci(u32 execution_stage);
 int mbox_get_fpga_config_status(u32 cmd);
 int mbox_get_fpga_config_status_psci(u32 cmd);
 #endif /* _MAILBOX_S10_H_ */
diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-socfpga/mailbox_s10.c
index 9a31a0e9ba..e9c3d28435 100644
--- a/arch/arm/mach-socfpga/mailbox_s10.c
+++ b/arch/arm/mach-socfpga/mailbox_s10.c
@@ -433,6 +433,12 @@ int mbox_hps_stage_notify(u32 execution_stage)
 			     MBOX_CMD_DIRECT, 1, &execution_stage, 0, 0, NULL);
 }
 
+int  __secure mbox_hps_stage_notify_psci(u32 execution_stage)
+{
+	return mbox_send_cmd_psci(MBOX_ID_UBOOT, MBOX_HPS_STAGE_NOTIFY,
+			     MBOX_CMD_DIRECT, 1, &execution_stage, 0, 0, NULL);
+}
+
 int mbox_get_fpga_config_status(u32 cmd)
 {
 	return __mbox_get_fpga_config_status(cmd);
diff --git a/arch/arm/mach-socfpga/rsu_s10.c b/arch/arm/mach-socfpga/rsu_s10.c
index a8f1cfaf26..25af8d1106 100644
--- a/arch/arm/mach-socfpga/rsu_s10.c
+++ b/arch/arm/mach-socfpga/rsu_s10.c
@@ -693,6 +693,23 @@ static int status_log(int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
+static int rsu_notify(int argc, char * const argv[])
+{
+	u32 stage;
+	char *endp;
+	int ret;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	stage = simple_strtoul(argv[1], &endp, 16);
+	ret = mbox_hps_stage_notify(stage);
+	if (ret)
+		return CMD_RET_FAILURE;
+
+	return CMD_RET_SUCCESS;
+}
+
 struct func_t {
 	const char *cmd_string;
 	int (*func_ptr)(int cmd_argc, char * const cmd_argv[]);
@@ -717,7 +734,8 @@ static const struct func_t rsu_func_t[] = {
 	{"slot_verify_buf", slot_verify_buf},
 	{"slot_verify_buf_raw", slot_verify_buf_raw},
 	{"status_log", status_log},
-	{"update", rsu_update}
+	{"update", rsu_update},
+	{"notify", rsu_notify}
 };
 
 int do_rsu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -762,5 +780,6 @@ U_BOOT_CMD(
 	"slot_verify_buf_raw <slot> <buffer> <size> - verify slot contents against raw buffer\n"
 	"status_log - display RSU status\n"
 	"update <flash_offset> - Initiate firmware to load bitstream as specified by flash_offset\n"
+	"notify <value> - Let SDM know the current state of HPS software\n"
 	""
 );
diff --git a/arch/arm/mach-socfpga/smc_rsu_s10.c b/arch/arm/mach-socfpga/smc_rsu_s10.c
index c5b862a8d0..6e0c506ebf 100644
--- a/arch/arm/mach-socfpga/smc_rsu_s10.c
+++ b/arch/arm/mach-socfpga/smc_rsu_s10.c
@@ -50,7 +50,23 @@ static void __secure smc_socfpga_rsu_update_psci(unsigned long function_id,
 	SMC_RET_REG_MEM(r);
 }
 
+static void __secure smc_socfpga_rsu_notify_psci(unsigned long function_id,
+					    unsigned long execution_stage)
+{
+	SMC_ALLOC_REG_MEM(r);
+	SMC_INIT_REG_MEM(r);
+
+	if (mbox_hps_stage_notify_psci(execution_stage))
+		SMC_ASSIGN_REG_MEM(r, SMC_ARG0, INTEL_SIP_SMC_RSU_ERROR);
+	else
+		SMC_ASSIGN_REG_MEM(r, SMC_ARG0, INTEL_SIP_SMC_STATUS_OK);
+
+	SMC_RET_REG_MEM(r);
+}
+
 DECLARE_SECURE_SVC(rsu_status_psci, INTEL_SIP_SMC_RSU_STATUS,
 		   smc_socfpga_rsu_status_psci);
 DECLARE_SECURE_SVC(rsu_update_psci, INTEL_SIP_SMC_RSU_UPDATE,
 		   smc_socfpga_rsu_update_psci);
+DECLARE_SECURE_SVC(rsu_notify_psci, INTEL_SIP_SMC_RSU_NOTIFY,
+		   smc_socfpga_rsu_notify_psci);
diff --git a/include/linux/intel-smc.h b/include/linux/intel-smc.h
index 975479b5fc..902464d280 100644
--- a/include/linux/intel-smc.h
+++ b/include/linux/intel-smc.h
@@ -325,4 +325,21 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
 #define INTEL_SIP_SMC_ECC_DBE \
 	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
 
+/*
+* Request INTEL_SIP_SMC_RSU_NOTIFY
+*
+* Sync call used by service driver at EL1 to report HPS software execution stage
+*
+* Call register usage:
+* a0 INTEL_SIP_SMC_RSU_NOTIFY
+* a1 32bit HPS software execution stage
+* a2-7 not used
+*
+* Return status
+ * a0 INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
+*/
+#define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14
+#define INTEL_SIP_SMC_RSU_NOTIFY \
+	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY)
+
 #endif