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authorTien Fong Chee <tien.fong.chee@intel.com>2019-08-01 19:50:11 +0800
committerTien Fong Chee <tien.fong.chee@intel.com>2019-08-15 13:20:02 +0800
commit41650f763438ae700dd4ac0d3c4ae076239854d6 (patch)
tree4077829e728cf050a282dbfd9f4245c04f2d22bb
parentb36ddf179d2f3be662e47df1ad2153bca3c2eacc (diff)
downloadu-boot-socfpga-41650f763438ae700dd4ac0d3c4ae076239854d6.tar.gz
HSD #1409755457-10: arm: dts: Stratix10: Add SDRAM node
commit ID: bc179908769637cb800ad8c111290e7cae6ead79 Add SDRAM device tree node. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
-rwxr-xr-xarch/arm/dts/socfpga_stratix10_socdk.dts9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts
index a3b2754fcf..fdd30e66ae 100755
--- a/arch/arm/dts/socfpga_stratix10_socdk.dts
+++ b/arch/arm/dts/socfpga_stratix10_socdk.dts
@@ -230,5 +230,14 @@
spi-max-frequency = <25000000>;
status = "disabled";
};
+
+ sdr: sdr@f8000400 {
+ compatible = "altr,sdr-ctl-s10";
+ reg = <0x0 0xf8000400 0x80>,
+ <0x0 0xf8010000 0x190>,
+ <0x0 0xf8011000 0x500>;
+ resets = <&rst DDRSCH_RESET>;
+ u-boot,dm-pre-reloc;
+ };
};
};