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| author | Tien Fong Chee <tien.fong.chee@intel.com> | 2019-10-18 15:57:16 +0800 |
|---|---|---|
| committer | Thor Thayer <thor.thayer@linux.intel.com> | 2019-10-31 17:07:22 -0500 |
| commit | 7177e8d0b37fe97f041499b9a619f79d339638b4 (patch) | |
| tree | 27674cada9eeed4f52449a5481ee9ff7596ec4fd | |
| parent | c51e9895ee31ab74d4b58c2617369b6161a3d1fc (diff) | |
| download | u-boot-socfpga-7177e8d0b37fe97f041499b9a619f79d339638b4.tar.gz | |
configs: socfpga: Add CONFIG_NET_RANDOM_ETHADDR=y to SOCFPGA defconfig
Ethernet initialization is only work with properly set MAC addresses.
Hence, this config is required to create the random MAC addresses
for Ethernet initialization.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
| -rw-r--r-- | configs/socfpga_arria10_defconfig | 1 | ||||
| -rw-r--r-- | configs/socfpga_arria10_nand_defconfig | 1 | ||||
| -rw-r--r-- | configs/socfpga_arria10_qspi_defconfig | 1 | ||||
| -rw-r--r-- | configs/socfpga_arria5_defconfig | 1 | ||||
| -rw-r--r-- | configs/socfpga_cyclone5_defconfig | 1 |
5 files changed, 5 insertions, 0 deletions
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index b169dbf463..7b96194990 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -47,6 +47,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_TIMER=y diff --git a/configs/socfpga_arria10_nand_defconfig b/configs/socfpga_arria10_nand_defconfig index e95a5a7cca..008a858087 100644 --- a/configs/socfpga_arria10_nand_defconfig +++ b/configs/socfpga_arria10_nand_defconfig @@ -77,6 +77,7 @@ CONFIG_CMD_DHCP=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SYS_NS16550=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y diff --git a/configs/socfpga_arria10_qspi_defconfig b/configs/socfpga_arria10_qspi_defconfig index e63541c1d5..a7c6c32c7f 100644 --- a/configs/socfpga_arria10_qspi_defconfig +++ b/configs/socfpga_arria10_qspi_defconfig @@ -70,6 +70,7 @@ CONFIG_CMD_DHCP=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SYS_NS16550=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index d514b14364..c142c031ab 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -50,6 +50,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 2d1a20154a..04b37b500f 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -51,6 +51,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y |