diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2020-01-30 00:55:54 +0900 |
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committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2020-02-14 14:54:57 +0800 |
commit | f016dde2c4fa6de33144e3211fd95dedc6aad965 (patch) | |
tree | 84f7e6ea014bfd54049797777c59cbc3706cfa08 | |
parent | 40865da57d6707904c2dbc101aa078d44a7bfde6 (diff) | |
download | u-boot-socfpga-rel_socfpga_v2019.10_20.03.01_pr.tar.gz |
mtd: rawnand: denali_dt: insert udelay() after reset deassertrel_socfpga_v2019.10_20.03.01_rc1rel_socfpga_v2019.10_20.03.01_pr
[Upstream commit 21d4a3ca549b5b1b8243c845b15f91142bfa3528]
When the reset signal is de-asserted, the HW-controlled bootstrap
starts running unless it is disabled in the SoC integration.
It issues some commands to detect a NAND chip, and sets up registers
automatically. Until this process finishes, software should avoid
any register access.
Without this delay function, some of UniPhier boards hangs up while
executing nand_scan_ident(). (denali_read_byte() is blocked)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-rw-r--r-- | drivers/mtd/nand/raw/denali_dt.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c index 91d0f20aae..1afc61f876 100644 --- a/drivers/mtd/nand/raw/denali_dt.c +++ b/drivers/mtd/nand/raw/denali_dt.c @@ -136,11 +136,19 @@ static int denali_dt_probe(struct udevice *dev) } ret = reset_get_bulk(dev, &resets); - if (ret) + if (ret) { dev_warn(dev, "Can't get reset: %d\n", ret); - else + } else { reset_deassert_bulk(&resets); + /* + * When the reset is deasserted, the initialization sequence is + * kicked (bootstrap process). The driver must wait until it is + * finished. Otherwise, it will result in unpredictable behavior. + */ + udelay(200); + } + return denali_init(denali); } |