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author | Yau Wai Gan <yau.wai.gan@intel.com> | 2021-01-04 22:13:42 +0800 |
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committer | Yau Wai Gan <yau.wai.gan@intel.com> | 2021-01-04 22:13:42 +0800 |
commit | c70f5cff30509d2ee0a3ca642f8cb7bdc53c3f0b (patch) | |
tree | 0d3935a1f5f6dccb53adbda1ca5a692145764a0a | |
parent | 94b667fbd7e6bbc97416a9117e55024b32a9dad9 (diff) | |
download | u-boot-socfpga-c70f5cff30509d2ee0a3ca642f8cb7bdc53c3f0b.tar.gz |
arm: dts: socfpga: stratix10: Update MMC smplsel valuerel_socfpga_v2020.10_RC_21.01.01_pr
This new MMC sample select value is obtained from running
tests on multiple Stratix 10 boards and proven working.
Signed-off-by: Yau Wai Gan <yau.wai.gan@intel.com>
-rwxr-xr-x | arch/arm/dts/socfpga_stratix10_socdk.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts index 6622720f77..8e6a405917 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk.dts +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -93,7 +93,7 @@ broken-cd; bus-width = <4>; drvsel = <3>; - smplsel = <0>; + smplsel = <2>; }; &qspi { |