diff options
| author | Ley Foon Tan <ley.foon.tan@intel.com> | 2020-11-02 15:35:55 +0800 |
|---|---|---|
| committer | Yau Wai Gan <yau.wai.gan@intel.com> | 2020-11-29 14:05:15 +0800 |
| commit | 07b51ae26f66f3c558593aadb9b23a2b91aee748 (patch) | |
| tree | adc98019a5b0a1e0408f3213da2a7b51c3bf35b1 /arch | |
| parent | 1ee3f4dac4557e2566ee970160d70b57326b10f1 (diff) | |
| download | u-boot-socfpga-07b51ae26f66f3c558593aadb9b23a2b91aee748.tar.gz | |
HSD: #1508430891-3: arm: socfpga: soc64: Move socfpga_init_smmu() to before boot SSBL
socfpga_init_smmu() change the L3 masters (eg: SDMMC, NAND and etc) to
non-secure , this cause the failure when L3 masters loading SSBL image to
secure region in DDR.
Move socfpga_init_smmu() to spl_perform_fixups(), so, it is called prior
running SSBL.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-socfpga/spl_agilex.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/spl_dm.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/spl_s10.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/spl_soc64.c | 3 |
4 files changed, 3 insertions, 9 deletions
diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c index 42f04a7bae..3a1908dd2d 100644 --- a/arch/arm/mach-socfpga/spl_agilex.c +++ b/arch/arm/mach-socfpga/spl_agilex.c @@ -69,9 +69,6 @@ void board_init_f(ulong dummy) firewall_setup(); - /* Setup and Initialize SMMU */ - socfpga_init_smmu(); - ret = uclass_get_device(UCLASS_CACHE, 0, &dev); if (ret) { debug("CCU init failed: %d\n", ret); diff --git a/arch/arm/mach-socfpga/spl_dm.c b/arch/arm/mach-socfpga/spl_dm.c index 0be8f29dbb..435994824d 100644 --- a/arch/arm/mach-socfpga/spl_dm.c +++ b/arch/arm/mach-socfpga/spl_dm.c @@ -72,9 +72,6 @@ void board_init_f(ulong dummy) firewall_setup(); - /* Setup and Initialize SMMU */ - socfpga_init_smmu(); - ret = uclass_get_device(UCLASS_CACHE, 0, &dev); if (ret) { printf("CCU init failed: %d\n", ret); diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index d9ffe57990..c598d6c336 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -75,9 +75,6 @@ void board_init_f(ulong dummy) firewall_setup(); - /* Setup and Initialize SMMU */ - socfpga_init_smmu(); - /* disable ocram security at CCU for non secure access */ clrbits_le32(CCU_REG_ADDR(CCU_CPU0_MPRT_ADMASK_MEM_RAM0), CCU_ADMASK_P_MASK | CCU_ADMASK_NS_MASK); diff --git a/arch/arm/mach-socfpga/spl_soc64.c b/arch/arm/mach-socfpga/spl_soc64.c index 44b6a9219a..fdff41488c 100644 --- a/arch/arm/mach-socfpga/spl_soc64.c +++ b/arch/arm/mach-socfpga/spl_soc64.c @@ -96,5 +96,8 @@ u32 spl_boot_mode(const u32 boot_device) /* board specific function prior loading SSBL / U-Boot */ void spl_perform_fixups(struct spl_image_info *spl_image) { + /* Setup and Initialize SMMU */ + socfpga_init_smmu(); + mbox_hps_stage_notify(HPS_EXECUTION_STATE_SSBL); } |