From 1c0168bcc067cd9941becef3671884361abd9922 Mon Sep 17 00:00:00 2001 From: Chin Liang See Date: Mon, 2 Jun 2014 16:52:35 +0800 Subject: FogBugz #208110: Fix the L4 clock calculation algorithm To fix the L4 clock calculation algorithm as the L4 divider in value of power of 2 instead divisor itself. Signed-off-by: Chin Liang See --- arch/arm/cpu/armv7/socfpga/clock_manager.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/socfpga/clock_manager.c b/arch/arm/cpu/armv7/socfpga/clock_manager.c index 8e4e556d89..62a27832bc 100644 --- a/arch/arm/cpu/armv7/socfpga/clock_manager.c +++ b/arch/arm/cpu/armv7/socfpga/clock_manager.c @@ -583,7 +583,7 @@ unsigned long cm_get_l4_sp_clk_hz(void) /* get the L4 SP clock which supplied to UART */ reg = readl(SOCFPGA_CLKMGR_ADDRESS + CLKMGR_MAINPLLGRP_MAINDIV_ADDRESS); reg = CLKMGR_MAINPLLGRP_MAINDIV_L4SPCLK_GET(reg); - clock = clock / (reg + 1); + clock = clock / (1 << reg); return clock; } -- cgit v1.2.1