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authorSimon Glass <sjg@chromium.org>2020-05-27 05:42:13 -0600
committerBin Meng <bmeng.cn@gmail.com>2020-06-02 09:16:13 +0800
commit501ba58ae614b2c65e302bfd6ea68f1e2c52ced0 (patch)
tree2e92b48bf30747e94bf02036dc510b18da0565fa
parent6e5ac59ec3788d8abd297084040445113c7af8ce (diff)
downloadu-boot-501ba58ae614b2c65e302bfd6ea68f1e2c52ced0.tar.gz
x86: coral: Correct some FSP-S settings
Some settings were modified slightly in the device-tree conversion. Return these to their original values. This includes some audio settings and a few others that have changed. Note that we still rely on the FSP defaults for most values, so there is no need to specify a value if the FSP default is suitable. This makes WiFi work again. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
-rw-r--r--arch/x86/dts/chromebook_coral.dts10
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index fe0d4dedd7..965d9f387d 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -599,13 +599,9 @@
fsps,emmc-rx-cmd-data-cntl1 = <0x00181717>;
fsps,emmc-rx-cmd-data-cntl2 = <0x10008>;
- /* Enable Audio Clock and Power gating */
- fsps,hd-audio-clk-gate = <1>;
- fsps,hd-audio-pwr-gate = <1>;
- fsps,bios-cfg-lock-down = <1>;
-
- /* Enable lpss s0ix */
- fsps,lpss-s0ix-enable = <1>;
+ /* Enable WiFi */
+ fsps,pcie-root-port-en = [01 00 00 00 00 00];
+ fsps,pcie-rp-hot-plug = [00 00 00 00 00 00];
fsps,skip-mp-init = <1>;
fsps,spi-eiss = <0>;