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| author | Lucas Stach <dev@lynxeye.de> | 2012-05-01 12:50:05 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-05-15 08:31:40 +0200 |
| commit | b8cb5194f004429af13a2c616bef923b70ca1b9e (patch) | |
| tree | f6d9df3e3858e21b7c137028dcef451779edb76e | |
| parent | 2cacf516df84228f03a1a67bbea387d76cdd34d0 (diff) | |
| download | u-boot-b8cb5194f004429af13a2c616bef923b70ca1b9e.tar.gz | |
tegra2: trivially enable 13 mhz crystal frequency
This is needed for upcoming Toradex Colibri T20 upstream support.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
| -rw-r--r-- | arch/arm/cpu/armv7/tegra2/clock.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/clock.c b/arch/arm/cpu/armv7/tegra2/clock.c index b6b32107fe..ccad351639 100644 --- a/arch/arm/cpu/armv7/tegra2/clock.c +++ b/arch/arm/cpu/armv7/tegra2/clock.c @@ -1059,7 +1059,10 @@ void clock_early_init(void) clock_set_rate(CLOCK_ID_CGENERAL, 600, 26, 0, 8); break; - case CLOCK_OSC_FREQ_13_0: + case CLOCK_OSC_FREQ_13_0: /* OSC is 13Mhz */ + clock_set_rate(CLOCK_ID_PERIPH, 432, 13, 1, 8); + clock_set_rate(CLOCK_ID_CGENERAL, 600, 13, 0, 8); + break; case CLOCK_OSC_FREQ_19_2: default: /* |