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author | Wolfgang Wallner <wolfgang.wallner@br-automation.com> | 2020-02-03 11:38:05 +0100 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2020-02-04 12:54:55 +0800 |
commit | 28c626804dee51dd89a5a400e0cb663ee9cc77ed (patch) | |
tree | df6cb026f9ef29c88af6bcccdcccee526133aef0 | |
parent | b840c395c64fd2dfadb96717bb6898a3069239a0 (diff) | |
download | u-boot-28c626804dee51dd89a5a400e0cb663ee9cc77ed.tar.gz |
gpio: intel_gpio: Clear tx state bit when setting output
Add missing 'PAD_CFG0_TX_STATE' to the clear mask for pcr_clrsetbits32().
Otherwise this bit cannot be cleared again after it has been set once.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-rw-r--r-- | drivers/gpio/intel_gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index b05cfc4aed..be91626cc5 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -41,7 +41,7 @@ static int intel_gpio_direction_output(struct udevice *dev, uint offset, pcr_clrsetbits32(pinctrl, config_offset, PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE | - PAD_CFG0_TX_DISABLE, + PAD_CFG0_TX_DISABLE | PAD_CFG0_TX_STATE, PAD_CFG0_MODE_GPIO | PAD_CFG0_RX_DISABLE | (value ? PAD_CFG0_TX_STATE : 0)); |