ppc: qemu: Switch over to use DM ETH and PCI

At present the board supports non-DM version PCI and E1000 drivers.
Switch over to use DM ETH and PCI by:

- Rewrite the PCI address map functions using DM APIs
- Enable CONFIG_MISC_INIT_R to do the PCI initialization and
  address map
- Drop unnecessary ad-hoc config macros
- Remove board_eth_init() in the board codes

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

3 files changed, 24 insertions, 104 deletions

diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c
index db13582f0f..659f794317 100644
--- a/board/freescale/qemu-ppce500/qemu-ppce500.c
+++ b/board/freescale/qemu-ppce500/qemu-ppce500.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <command.h>
 #include <cpu_func.h>
+#include <dm.h>
 #include <env.h>
 #include <init.h>
 #include <log.h>
@@ -79,27 +80,9 @@ int checkboard(void)
 	return 0;
 }
 
-static int pci_map_region(void *fdt, int pci_node, int range_id,
-			  phys_addr_t *pbaddr, phys_size_t *ppaddr,
-			  pci_addr_t *pvaddr, pci_size_t *psize,
-			  ulong *pmap_addr)
+static int pci_map_region(phys_addr_t paddr, phys_size_t size, ulong *pmap_addr)
 {
-	uint64_t baddr;
-	uint64_t paddr;
-	uint64_t size;
 	ulong map_addr;
-	int r;
-
-	r = fdt_read_range(fdt, pci_node, range_id, &baddr, &paddr, &size);
-	if (r)
-		return r;
-
-	if (pbaddr)
-		*pbaddr = baddr;
-	if (ppaddr)
-		*ppaddr = paddr;
-	if (psize)
-		*psize = size;
 
 	if (!pmap_addr)
 		return 0;
@@ -117,82 +100,37 @@ static int pci_map_region(void *fdt, int pci_node, int range_id,
 	assert(!tlb_map_range(map_addr, paddr, size, TLB_MAP_IO));
 	*pmap_addr = map_addr + size;
 
-	if (pvaddr)
-		*pvaddr = map_addr;
-
 	return 0;
 }
 
-void pci_init_board(void)
+int misc_init_r(void)
 {
-	struct pci_controller *pci_hoses;
-	void *fdt = get_fdt_virt();
-	int pci_node = -1;
-	int pci_num = 0;
-	int pci_count = 0;
+	struct udevice *dev;
+	struct pci_region *io;
+	struct pci_region *mem;
+	struct pci_region *pre;
 	ulong map_addr;
+	int ret;
 
-	puts("\n");
+	/* Ensure PCI is probed */
+	uclass_first_device(UCLASS_PCI, &dev);
+
+	pci_get_regions(dev, &io, &mem, &pre);
 
 	/* Start MMIO and PIO range maps above RAM */
 	map_addr = CONFIG_SYS_PCI_MAP_START;
 
-	/* Count and allocate PCI buses */
-	pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
-			"device_type", "pci", 4);
-	while (pci_node != -FDT_ERR_NOTFOUND) {
-		pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
-				"device_type", "pci", 4);
-		pci_count++;
-	}
-
-	if (pci_count) {
-		pci_hoses = malloc(sizeof(struct pci_controller) * pci_count);
-	} else {
-		printf("PCI: disabled\n\n");
-		return;
-	}
+	/* Map MMIO range */
+	ret = pci_map_region(mem->phys_start, mem->size, &map_addr);
+	if (ret)
+		return ret;
 
-	/* Spawn PCI buses based on device tree */
-	pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
-			"device_type", "pci", 4);
-	while (pci_node != -FDT_ERR_NOTFOUND) {
-		struct fsl_pci_info pci_info = { };
-		const fdt32_t *reg;
-		int r;
-
-		reg = fdt_getprop(fdt, pci_node, "reg", NULL);
-		pci_info.regs = fdt_translate_address(fdt, pci_node, reg);
-
-		/* Map MMIO range */
-		r = pci_map_region(fdt, pci_node, 0, &pci_info.mem_bus,
-				   &pci_info.mem_phys, NULL,
-				   &pci_info.mem_size, &map_addr);
-		if (r)
-			break;
-
-		/* Map PIO range */
-		r = pci_map_region(fdt, pci_node, 1, &pci_info.io_bus,
-				   &pci_info.io_phys, NULL,
-				   &pci_info.io_size, &map_addr);
-		if (r)
-			break;
-
-		/* Instantiate */
-		pci_info.pci_num = pci_num + 1;
-
-		fsl_setup_hose(&pci_hoses[pci_num], pci_info.regs);
-		printf("PCI: base address %lx\n", pci_info.regs);
-
-		fsl_pci_init_port(&pci_info, &pci_hoses[pci_num], pci_num);
-
-		/* Jump to next PCI node */
-		pci_node = fdt_node_offset_by_prop_value(fdt, pci_node,
-				"device_type", "pci", 4);
-		pci_num++;
-	}
+	/* Map PIO range */
+	ret = pci_map_region(io->phys_start, io->size, &map_addr);
+	if (ret)
+		return ret;
 
-	puts("\n");
+	return 0;
 }
 
 int last_stage_init(void)
@@ -235,16 +173,9 @@ static uint64_t get_linear_ram_size(void)
 	panic("Couldn't determine RAM size");
 }
 
-int board_eth_init(struct bd_info *bis)
-{
-	return pci_eth_init(bis);
-}
-
 #if defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
-	FT_FSL_PCI_SETUP;
-
 	return 0;
 }
 #endif
diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index c528a68bfa..4a4b3699b5 100644
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -11,7 +11,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_BOOTDELAY=1
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_LAST_STAGE_INIT=y
-# CONFIG_MISC_INIT_R is not set
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_REGINFO=y
 CONFIG_CMD_BOOTZ=y
@@ -29,7 +28,10 @@ CONFIG_ENV_OVERWRITE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 # CONFIG_MMC is not set
+CONFIG_DM_ETH=y
 CONFIG_E1000=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_MPC85XX=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_ADDR_MAP=y
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index feac6ef8fa..b1ee810f01 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -13,8 +13,6 @@
 
 #define CONFIG_SYS_RAMBOOT
 
-#define CONFIG_PCI1		1	/* PCI controller 1 */
-#define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
 
 #define CONFIG_ENABLE_36BIT_PHYS
@@ -73,17 +71,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
 
-/*
- * General PCI
- * Memory space is mapped 1-1, but I/O space must start from 0.
- */
-
-#ifdef CONFIG_PCI
-#define CONFIG_PCI_INDIRECT_BRIDGE
-
-#define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
-#endif	/* CONFIG_PCI */
-
 #define CONFIG_LBA48
 
 /*