diff options
| author | Chia-Wei, Wang <chiawei_wang@aspeedtech.com> | 2020-08-03 17:36:08 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-08-14 09:46:40 -0400 |
| commit | 98ef128b56b84249f05a840d24a079ec9baef814 (patch) | |
| tree | e06db0992f93f3943f681e84216a622a75fc7129 | |
| parent | c16f518a7973c26bb0b8a30b5624ac09b968bc0e (diff) | |
| download | u-boot-98ef128b56b84249f05a840d24a079ec9baef814.tar.gz | |
include/configs: aspeed: Remove hardcoded variables
The hardcoded platform variables such as DRAM base address are not
common to Aspeed SoCs AST24xx/AST25xx/AST26xx. This patch replaces
those hardcoded with macros defined in a newly added header, where
the basic SoC HW information are assigned accordingly.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
| -rw-r--r-- | arch/arm/include/asm/arch-aspeed/platform.h | 20 | ||||
| -rw-r--r-- | include/configs/aspeed-common.h | 16 |
2 files changed, 29 insertions, 7 deletions
diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h new file mode 100644 index 0000000000..6cee036f54 --- /dev/null +++ b/arch/arm/include/asm/arch-aspeed/platform.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) ASPEED Technology Inc. + * Ryan Chen <ryan_chen@aspeedtech.com> + * + */ + +#ifndef _ASM_ARCH_PLATFORM_H +#define _ASM_ARCH_PLATFORM_H + +#if defined(CONFIG_ASPEED_AST2500) +#define ASPEED_MAC_COUNT 2 +#define ASPEED_DRAM_BASE 0x80000000 +#define ASPEED_SRAM_BASE 0x1e720000 +#define ASPEED_SRAM_SIZE 0x9000 +#else +#err "Unrecognized Aspeed platform." +#endif + +#endif diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 1295a6cd19..14dd5c795d 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -7,22 +7,24 @@ * (C) Copyright 2016 Google, Inc */ -#ifndef __AST_COMMON_CONFIG_H -#define __AST_COMMON_CONFIG_H +#ifndef _ASPEED_COMMON_CONFIG_H +#define _ASPEED_COMMON_CONFIG_H + +#include <asm/arch/platform.h> /* Misc CPU related */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_BASE ASPEED_DRAM_BASE #ifdef CONFIG_PRE_CON_BUF_SZ -#define CONFIG_SYS_INIT_RAM_ADDR (0x1e720000 + CONFIG_PRE_CON_BUF_SZ) -#define CONFIG_SYS_INIT_RAM_SIZE (36*1024 - CONFIG_PRE_CON_BUF_SZ) +#define CONFIG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE + CONFIG_PRE_CON_BUF_SZ) +#define CONFIG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE - CONFIG_PRE_CON_BUF_SZ) #else -#define CONFIG_SYS_INIT_RAM_ADDR (0x1e720000) -#define CONFIG_SYS_INIT_RAM_SIZE (36*1024) +#define CONFIG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE) +#define CONFIG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE) #endif #define SYS_INIT_RAM_END (CONFIG_SYS_INIT_RAM_ADDR \ |