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| author | Edward Cragg <edward.cragg@codethink.co.uk> | 2016-03-14 14:06:28 +0000 |
|---|---|---|
| committer | Edward Cragg <edward.cragg@codethink.co.uk> | 2016-03-14 14:06:28 +0000 |
| commit | 60237b2a539a8b13b80d589325f25c7d64281dc9 (patch) | |
| tree | c33491286bb7b6a4a8c9e81f2da8416dc2868da7 | |
| parent | 591a5cf57c261bd3e0e2ac6054c6e8659d803217 (diff) | |
| download | u-boot-baserock/edcragg/tegra-jetson-tx1-support.tar.gz | |
Change environment fdt_copy_node_namesbaserock/edcragg/tegra-jetson-tx1-support
The memory controller fdt nodes specified are not supported in the upstream
kernel (for enabling memory frequency scaling), so are disabled to avoid
U-Boot crashing in the case that the environment isn't otherwise modified to
remove this [1]. Add CPU and PSCI nodes instead, since copying these from the
first stage bootloader device tree allows SMP to work.
[1] http://elinux.org/Jetson_TX1
| -rw-r--r-- | include/configs/tegra210-common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 2a2753e944..3d7d1ed1f4 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -63,7 +63,7 @@ "fdt_addr_r=0x82000000\0" \ "ramdisk_addr_r=0x83100000\0" \ "fdt_copy_src_addr=0x83080000\0" \ - "fdt_copy_node_names=/memory-controller@7001b000\0" + "fdt_copy_node_names=/cpus:/psci\0" /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x80108000 |