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authorChen-Yu Tsai <wens@csie.org>2016-07-05 21:45:05 +0800
committerHans de Goede <hdegoede@redhat.com>2016-07-15 15:54:57 +0200
commitdbf38aabd9f4d4fd4d9bd4eeeba88e0e47dcb27c (patch)
tree0a4d2906f094bafad0b600281bf916687a9091ff
parenta1274cc94a20a0fc6715522d021ab84969b6bf91 (diff)
downloadu-boot-dbf38aabd9f4d4fd4d9bd4eeeba88e0e47dcb27c.tar.gz
ARM: PSCI: Add missing CONFIG_ARMV7_PSCI_NR_CPUS for PSCI enabled platforms
The original PSCI implementation assumed CONFIG_ARMV7_PSCI_NR_CPUS=4. Add this to platforms that have not defined it, using CONFIG_MAX_CPUS if it is defined, or the actual number of cores for the given platform. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
-rw-r--r--include/configs/jetson-tk1.h1
-rw-r--r--include/configs/ls1021aqds.h1
-rw-r--r--include/configs/ls1021atwr.h1
3 files changed, 3 insertions, 0 deletions
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
index 953c088050..2b172a5073 100644
--- a/include/configs/jetson-tk1.h
+++ b/include/configs/jetson-tk1.h
@@ -61,6 +61,7 @@
#include "tegra-common-post.h"
#define CONFIG_ARMV7_PSCI 1
+#define CONFIG_ARMV7_PSCI_NR_CPUS 4
/* Reserve top 1M for secure RAM */
#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index db684d2558..eb444ebd59 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -10,6 +10,7 @@
#define CONFIG_LS102XA
#define CONFIG_ARMV7_PSCI
+#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS
#define CONFIG_SYS_FSL_CLK
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 0fb28eff55..616aebb4e9 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -10,6 +10,7 @@
#define CONFIG_LS102XA
#define CONFIG_ARMV7_PSCI
+#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS
#define CONFIG_SYS_FSL_CLK