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authorMario Six <mario.six@gdsys.cc>2018-08-06 10:23:38 +0200
committerSimon Glass <sjg@chromium.org>2018-09-18 00:01:18 -0600
commit2c21749d7118b66b98cbab3f6301576726e06525 (patch)
tree7b4bc996c57e0799f82c41804cdda661851b2ec7 /Documentation
parentd259f975d475ced7623eb5a8fdc6abe82f996afd (diff)
downloadu-boot-2c21749d7118b66b98cbab3f6301576726e06525.tar.gz
timer: Add MPC83xx timer driver
Add a timer driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/timer/fsl,mpc83xx-timer.txt21
1 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/timer/fsl,mpc83xx-timer.txt b/Documentation/devicetree/bindings/timer/fsl,mpc83xx-timer.txt
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index 0000000000..608d24110b
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+++ b/Documentation/devicetree/bindings/timer/fsl,mpc83xx-timer.txt
@@ -0,0 +1,21 @@
+MPC83xx timer devices
+
+MPC83xx SoCs offer a decrementer interrupt that can be used to implement delay
+functionality, and periodically triggered actions.
+
+Required properties:
+- compatible: must be "fsl,mpc83xx-timer"
+- clocks: must be a reference to the system's CSB (coherent system bus) clock,
+ provided by one of the "fsl,mpc83xx-clk" devices
+
+Example:
+
+socclocks: clocks {
+ compatible = "fsl,mpc832x-clk";
+ #clock-cells = <1>;
+};
+
+timer {
+ compatible = "fsl,mpc83xx-timer";
+ clocks = <&socclocks MPC83XX_CLK_CSB>;
+};