diff options
| author | Simon Glass <sjg@chromium.org> | 2016-10-02 18:00:56 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-10-06 20:40:03 -0400 |
| commit | 84777634621d13a75ea33c7c2ed1a7a76a609a93 (patch) | |
| tree | 49574fa0f06ac2cb0fe5e42cc80ecc7436126ce5 /README | |
| parent | d32b2d1c6168a6669ce6e6300eb893ddec675a05 (diff) | |
| download | u-boot-84777634621d13a75ea33c7c2ed1a7a76a609a93.tar.gz | |
README: Drop old Intel Monahans comment
This is no longer in the U-Boot source code, so drop this note from the
README.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'README')
| -rw-r--r-- | README | 14 |
1 files changed, 0 insertions, 14 deletions
@@ -578,20 +578,6 @@ The following options need to be configured: CONFIG_SYS_FSL_SEC_LE Defines the SEC controller register space as Little Endian -- Intel Monahans options: - CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO - - Defines the Monahans run mode to oscillator - ratio. Valid values are 8, 16, 24, 31. The core - frequency is this value multiplied by 13 MHz. - - CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO - - Defines the Monahans turbo mode to oscillator - ratio. Valid values are 1 (default if undefined) and - 2. The core frequency as calculated above is multiplied - by this value. - - MIPS CPU options: CONFIG_SYS_INIT_SP_OFFSET |