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| author | Nishanth Menon <nm@ti.com> | 2015-03-09 17:12:00 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-03-13 09:28:48 -0400 |
| commit | b45c48a7c30734272371fede01e96f499a314664 (patch) | |
| tree | f419e13accf870c448e231c9702b656957767aef /README | |
| parent | c616a0df297e886f09bf88523bcd03a86bdf8704 (diff) | |
| download | u-boot-b45c48a7c30734272371fede01e96f499a314664.tar.gz | |
ARM: Introduce erratum workaround for 454179
454179: Stale prediction may inhibit target address misprediction on
next predicted taken branch
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set IBE and disable branch size mispredict to 1
Also provide a hook for SoC specific handling to take place if needed.
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'README')
| -rw-r--r-- | README | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -693,6 +693,7 @@ The following options need to be configured: NOTE: The following can be machine specific errata. These do have ability to provide rudimentary version and machine specific checks, but expect no product checks. + CONFIG_ARM_ERRATA_454179 CONFIG_ARM_ERRATA_798870 - Tegra SoC options: |