diff options
| author | Simon Glass <sjg@chromium.org> | 2012-12-13 20:48:32 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-02-01 15:07:49 -0500 |
| commit | b339051c0d45599c3c874141c52d912d78991dd4 (patch) | |
| tree | 1a78d10e99fe38a735ef9de3884709b1f3966059 /arch/arm/cpu/arm920t | |
| parent | f47e6ecd5d0cca61602a3d569b40a99d0bb7604a (diff) | |
| download | u-boot-b339051c0d45599c3c874141c52d912d78991dd4.tar.gz | |
arm: Move timer_rate_hz into arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/cpu/arm920t')
| -rw-r--r-- | arch/arm/cpu/arm920t/a320/timer.c | 8 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/s3c24x0/timer.c | 4 |
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c index 4bfcef2379..287364399c 100644 --- a/arch/arm/cpu/arm920t/a320/timer.c +++ b/arch/arm/cpu/arm920t/a320/timer.c @@ -31,14 +31,14 @@ DECLARE_GLOBAL_DATA_PTR; static inline unsigned long long tick_to_time(unsigned long long tick) { tick *= CONFIG_SYS_HZ; - do_div(tick, gd->timer_rate_hz); + do_div(tick, gd->arch.timer_rate_hz); return tick; } static inline unsigned long long usec_to_tick(unsigned long long usec) { - usec *= gd->timer_rate_hz; + usec *= gd->arch.timer_rate_hz; do_div(usec, 1000000); return usec; @@ -74,7 +74,7 @@ int timer_init(void) cr |= FTTMR010_TM3_ENABLE; writel(cr, &tmr->cr); - gd->timer_rate_hz = TIMER_CLOCK; + gd->arch.timer_rate_hz = TIMER_CLOCK; gd->tbu = gd->tbl = 0; return 0; @@ -126,5 +126,5 @@ ulong get_timer(ulong base) */ ulong get_tbclk(void) { - return gd->timer_rate_hz; + return gd->arch.timer_rate_hz; } diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c index d8668bec5e..7694feac67 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/timer.c +++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c @@ -52,7 +52,7 @@ int timer_init(void) * @33.25MHz and 15625 @ 50 MHz */ gd->tbu = get_PCLK() / (2 * 16 * 100); - gd->timer_rate_hz = get_PCLK() / (2 * 16); + gd->arch.timer_rate_hz = get_PCLK() / (2 * 16); } /* load value for 10 ms timeout */ writel(gd->tbu, &timers->tcntb4); @@ -93,7 +93,7 @@ ulong get_timer_masked(void) { ulong tmr = get_ticks(); - return tmr / (gd->timer_rate_hz / CONFIG_SYS_HZ); + return tmr / (gd->arch.timer_rate_hz / CONFIG_SYS_HZ); } void udelay_masked(unsigned long usec) |