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authorSuman Anna <s-anna@ti.com>2020-08-17 18:15:10 -0500
committerLokesh Vutla <lokeshvutla@ti.com>2020-09-15 18:51:53 +0530
commit10c4de02f0f0e424d196a47fb933f2d619966cfe (patch)
tree0183af7f4ee1d43dd227897858cfdd42abb16eec /arch/arm/dts/k3-j7200-common-proc-board.dts
parent7873e9df8fc47fb2532112e7fe4ad546f7a46fcb (diff)
downloadu-boot-10c4de02f0f0e424d196a47fb933f2d619966cfe.tar.gz
arm: dts: k3-j7200-mcu: Add MCU domain R5F cluster node
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS) subsystems/clusters. One R5F cluster is present within the MCU domain (MCU_R5FSS0), and the other one is present within the MAIN domain (MAIN_R5FSS0). Each of these can be configured at boot time to be either run in a LockStep mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode. These subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal memories for each core split between two banks - ATCM and BTCM (further interleaved into two banks). The TCMs of both Cores are combined in LockStep-mode to provide a larger 128 KB of memory. Add the DT node for the MCU domain R5F cluster/subsystem, the two R5F cores are added as child nodes to the main cluster/subsystem node. The cluster is configured to run in LockStep mode by default, with the ATCMs enabled to allow the R5 cores to execute code from DDR with boot-strapping code from ATCM. The inter-processor communication between the main A72 cores and these processors is achieved through shared memory and Mailboxes. Signed-off-by: Suman Anna <s-anna@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-j7200-common-proc-board.dts')
-rw-r--r--arch/arm/dts/k3-j7200-common-proc-board.dts5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts
index 3f1d03c960..b485889525 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-common-proc-board.dts
@@ -13,6 +13,11 @@
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
};
+
+ aliases {
+ remoteproc0 = &mcu_r5fss0_core0;
+ remoteproc1 = &mcu_r5fss0_core1;
+ };
};
&wkup_pmx0 {