summaryrefslogtreecommitdiff
path: root/arch/arm/dts/sama7g5.dtsi
diff options
context:
space:
mode:
authorClaudiu Beznea <claudiu.beznea@microchip.com>2020-06-02 15:35:55 +0300
committerEugen Hristev <eugen.hristev@microchip.com>2021-01-07 09:44:15 +0200
commit13f986b748fea1ca15ffd260fd332fc4dbd58bfb (patch)
tree442c2031e2be958c15f4b150dc88d94e2e590988 /arch/arm/dts/sama7g5.dtsi
parent2942a2f9d50abf50f42f31b30671009248e31431 (diff)
downloadu-boot-13f986b748fea1ca15ffd260fd332fc4dbd58bfb.tar.gz
ARM: dts: sama7g5: add CPU bindings
Add CPU DT bindings. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Diffstat (limited to 'arch/arm/dts/sama7g5.dtsi')
-rw-r--r--arch/arm/dts/sama7g5.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index a41306431a..7918b9174e 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -40,6 +40,18 @@
};
};
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ A7_0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_CORE 22>, <&main_xtal>;
+ clock-names = "cpu", "master", "xtal";
+ };
+ };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;