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authorPatrick Delaunay <patrick.delaunay@st.com>2019-07-11 11:15:28 +0200
committerPatrick Delaunay <patrick.delaunay@st.com>2019-07-12 11:18:53 +0200
commit35a54d41d9d4e91f75c87a16f7db7e362549d4f9 (patch)
tree8ad7d88413bf56083f2c3e69df9ff5431cf4d9a8 /arch/arm/dts/stm32mp157-u-boot.dtsi
parent2ed212c1a26825626d77bac21783c9fc377cff43 (diff)
downloadu-boot-35a54d41d9d4e91f75c87a16f7db7e362549d4f9.tar.gz
ARM: dts: stm32mp1: sync device tree with v5.2-rc4
Synchronize device tree with v5.2-rc4 label and update the associated u-boot dtsi. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Diffstat (limited to 'arch/arm/dts/stm32mp157-u-boot.dtsi')
-rw-r--r--arch/arm/dts/stm32mp157-u-boot.dtsi60
1 files changed, 36 insertions, 24 deletions
diff --git a/arch/arm/dts/stm32mp157-u-boot.dtsi b/arch/arm/dts/stm32mp157-u-boot.dtsi
index c9f534e4ea..f7c7acc079 100644
--- a/arch/arm/dts/stm32mp157-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157-u-boot.dtsi
@@ -21,11 +21,11 @@
pinctrl1 = &pinctrl_z;
};
- config {
+ clocks {
u-boot,dm-pre-reloc;
};
- clocks {
+ reboot {
u-boot,dm-pre-reloc;
};
@@ -35,42 +35,26 @@
};
&bsec {
- u-boot,dm-pre-reloc;
-};
-
-&clk_hsi {
- u-boot,dm-pre-reloc;
-};
-
-&clk_hse {
- u-boot,dm-pre-reloc;
-};
-
-&clk_lse {
- u-boot,dm-pre-reloc;
-};
-
-&clk_lsi {
- u-boot,dm-pre-reloc;
+ u-boot,dm-pre-proper;
};
&clk_csi {
u-boot,dm-pre-reloc;
};
-&rcc {
+&clk_hsi {
u-boot,dm-pre-reloc;
};
-&rcc_reboot {
+&clk_hse {
u-boot,dm-pre-reloc;
};
-&pinctrl {
+&clk_lsi {
u-boot,dm-pre-reloc;
};
-&pinctrl_z {
+&clk_lse {
u-boot,dm-pre-reloc;
};
@@ -134,6 +118,34 @@
u-boot,dm-pre-reloc;
};
-&iwdg2 {
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl_z {
+ u-boot,dm-pre-reloc;
+};
+
+&pwr {
u-boot,dm-pre-reloc;
};
+
+&rcc {
+ u-boot,dm-pre-reloc;
+};
+
+&sdmmc1 {
+ compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
+};
+
+&sdmmc2 {
+ compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
+};
+
+&sdmmc3 {
+ compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
+};
+
+&usbotg_hs {
+ compatible = "st,stm32mp1-hsotg", "snps,dwc2";
+};