diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-16 17:03:51 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-29 03:50:15 +0900 |
| commit | 595dc1e162e2d8dce6a97a0199554d59b2589a5f (patch) | |
| tree | 122fc7de9da3548a85f922de315a113192d07220 /arch/arm/dts/uniphier-ph1-ld4.dtsi | |
| parent | b800cbde4fecd26b52aa1736b045ca3c3673fc94 (diff) | |
| download | u-boot-595dc1e162e2d8dce6a97a0199554d59b2589a5f.tar.gz | |
ARM: dts: uniphier: add GPIO controller nodes
Make the GPIO driver really active.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-ph1-ld4.dtsi')
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-ld4.dtsi | 112 |
1 files changed, 112 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi index 7c8759f929..f13c6db271 100644 --- a/arch/arm/dts/uniphier-ph1-ld4.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi @@ -56,6 +56,118 @@ cache-level = <2>; }; + port0x: gpio@55000008 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000008 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port1x: gpio@55000010 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000010 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port2x: gpio@55000018 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000018 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port3x: gpio@55000020 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000020 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port4: gpio@55000028 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000028 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port5x: gpio@55000030 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000030 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port6x: gpio@55000038 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000038 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port7x: gpio@55000040 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000040 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port8x: gpio@55000048 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000048 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port9x: gpio@55000050 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000050 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port10x: gpio@55000058 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000058 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port11x: gpio@55000060 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000060 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port12x: gpio@55000068 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000068 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port13x: gpio@55000070 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000070 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port14x: gpio@55000078 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000078 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + + port16x: gpio@55000088 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000088 0x8>; + gpio-controller; + #gpio-cells = <2>; + }; + i2c0: i2c@58400000 { compatible = "socionext,uniphier-i2c"; status = "disabled"; |