diff options
author | Stephen Warren <swarren@nvidia.com> | 2016-07-29 13:15:06 -0600 |
---|---|---|
committer | Tom Warren <twarren@nvidia.com> | 2016-08-15 10:26:13 -0700 |
commit | a6bb0084c2797b1e16403e2e812737ca1fb37669 (patch) | |
tree | e336113693bda3396f03baa8d99bea82315f621e /arch/arm/dts | |
parent | 45d85f0872ef92779ea5b51a424845a919a41462 (diff) | |
download | u-boot-a6bb0084c2797b1e16403e2e812737ca1fb37669.tar.gz |
ARM: tegra: enable PCIe controller on p2771-0000
p2771-0000 has a couple of PCIe ports; one physically x4 desktop PCI
connector (which may run at x2 electrically, depending on the board
version and configuration) and a x1 connection to the M.2 slot (which may
not be active, depending on the board version and configuration). This
change enables those.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r-- | arch/arm/dts/tegra186-p2771-0000-a02.dts | 19 | ||||
-rw-r--r-- | arch/arm/dts/tegra186-p2771-0000-b00.dts | 19 |
2 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/dts/tegra186-p2771-0000-a02.dts b/arch/arm/dts/tegra186-p2771-0000-a02.dts index 5ed3817a41..36a3c21a55 100644 --- a/arch/arm/dts/tegra186-p2771-0000-a02.dts +++ b/arch/arm/dts/tegra186-p2771-0000-a02.dts @@ -10,4 +10,23 @@ cd-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_LOW>; power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>; }; + + pcie-controller@10003000 { + status = "okay"; + + pci@1,0 { + status = "okay"; + nvidia,num-lanes = <2>; + }; + + pci@2,0 { + status = "disabled"; + nvidia,num-lanes = <1>; + }; + + pci@3,0 { + status = "okay"; + nvidia,num-lanes = <1>; + }; + }; }; diff --git a/arch/arm/dts/tegra186-p2771-0000-b00.dts b/arch/arm/dts/tegra186-p2771-0000-b00.dts index 90c99c33cc..0f1d0e83e8 100644 --- a/arch/arm/dts/tegra186-p2771-0000-b00.dts +++ b/arch/arm/dts/tegra186-p2771-0000-b00.dts @@ -10,4 +10,23 @@ cd-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>; power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>; }; + + pcie-controller@10003000 { + status = "okay"; + + pci@1,0 { + status = "okay"; + nvidia,num-lanes = <4>; + }; + + pci@2,0 { + status = "disabled"; + nvidia,num-lanes = <0>; + }; + + pci@3,0 { + status = "disabled"; + nvidia,num-lanes = <1>; + }; + }; }; |