diff options
author | Tom Rini <trini@konsulko.com> | 2020-07-22 11:30:52 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2020-07-22 11:30:52 -0400 |
commit | 95fc1f164723270b2b0bd8d7e2f7ba21bce66381 (patch) | |
tree | ac7b069cafc1178f6093944ee6a9b747d8b918e6 /arch/arm/mach-rockchip | |
parent | e9f1f5f48650301bd9e4194c474d19081c54f05b (diff) | |
parent | 8bedcf0ef9404f7f04da79783ba1ab8be7185cc2 (diff) | |
download | u-boot-95fc1f164723270b2b0bd8d7e2f7ba21bce66381.tar.gz |
Merge tag 'u-boot-rockchip-20200722' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchipWIP/22Jul2020
- New rk3326 board: Hardkernel Odroid Go2;
- Update board config and dts for RockPI 4/N8/N10;
- Update led boot on support for roc-rk3399-pc;
- Enable SPI Flash suppor for rk3328 rock64 board;
- Update rockchip pcie phy to use generic framework;
Diffstat (limited to 'arch/arm/mach-rockchip')
-rw-r--r-- | arch/arm/mach-rockchip/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/Makefile | 5 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/cpu-info.c | 26 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/px30/Kconfig | 4 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3288/rk3288.c | 30 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3399/rk3399.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/sdram.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/tpl.c | 7 |
8 files changed, 59 insertions, 26 deletions
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index e2b6326584..fcab1d5cee 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -99,6 +99,7 @@ config ROCKCHIP_RK322X config ROCKCHIP_RK3288 bool "Support Rockchip RK3288" select CPU_V7A + select OF_BOARD_SETUP select SUPPORT_SPL select SPL select SUPPORT_TPL diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 5b38526fe0..121f23a563 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -22,11 +22,14 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # we can have the preprocessor correctly recognise both 0x0 and 0 # meaning "turn it off". obj-y += boot_mode.o -obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o obj-$(CONFIG_MISC_INIT_R) += misc.o endif +ifeq ($(CONFIG_TPL_BUILD),) +obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o +endif + obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram.o obj-$(CONFIG_ROCKCHIP_PX30) += px30/ diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index 21ca9dedce..d0f030109f 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -13,7 +13,7 @@ #include <asm/arch-rockchip/hardware.h> #include <linux/err.h> -static char *get_reset_cause(void) +char *get_reset_cause(void) { struct rockchip_cru *cru = rockchip_get_cru(); char *cause = NULL; @@ -41,27 +41,25 @@ static char *get_reset_cause(void) cause = "unknown reset"; } - /** - * reset_reason env is used by rk3288, due to special use case - * to figure it the boot behavior. so keep this as it is. - */ - env_set("reset_reason", cause); - - /* - * Clear glb_rst_st, so we can determine the last reset cause - * for following resets. - */ - rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK); - return cause; } +#if CONFIG_IS_ENABLED(DISPLAY_CPUINFO) int print_cpuinfo(void) { + char *cause = get_reset_cause(); + printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC); - printf("Reset cause: %s\n", get_reset_cause()); + printf("Reset cause: %s\n", cause); + + /** + * reset_reason env is used by rk3288, due to special use case + * to figure it the boot behavior. so keep this as it is. + */ + env_set("reset_reason", cause); /* TODO print operating temparature and clock */ return 0; } +#endif diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig index 9f3ad4f623..f5373c6f9f 100644 --- a/arch/arm/mach-rockchip/px30/Kconfig +++ b/arch/arm/mach-rockchip/px30/Kconfig @@ -3,6 +3,9 @@ if ROCKCHIP_PX30 config TARGET_EVB_PX30 bool "EVB_PX30" +config TARGET_ODROID_GO2 + bool "ODROID_GO2" + config ROCKCHIP_BOOT_MODE_REG default 0xff010200 @@ -36,6 +39,7 @@ config DEBUG_UART_CHANNEL For using the UART for early debugging the route to use needs to be declared (0 or 1). +source "board/hardkernel/odroid_go2/Kconfig" source "board/rockchip/evb_px30/Kconfig" endif diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index 804abe8a1b..1a4ecdf625 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -13,6 +13,7 @@ #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> +#include <asm/arch-rockchip/cpu_rk3288.h> #include <asm/arch-rockchip/cru.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rk3288.h> @@ -115,6 +116,35 @@ int rk_board_late_init(void) return rk3288_board_late_init(); } +static int ft_rk3288w_setup(void *blob) +{ + const char *path; + int offs, ret; + + path = "/clock-controller@ff760000"; + offs = fdt_path_offset(blob, path); + if (offs < 0) { + debug("failed to found fdt path %s\n", path); + return offs; + } + + ret = fdt_setprop_string(blob, offs, "compatible", "rockchip,rk3288w-cru"); + if (ret) { + printf("failed to set rk3288w-cru compatible (ret=%d)\n", ret); + return ret; + } + + return ret; +} + +int ft_board_setup(void *blob, struct bd_info *bd) +{ + if (soc_is_rk3288w()) + return ft_rk3288w_setup(blob); + + return 0; +} + static int do_clock(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 4fda93b152..c643483971 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -241,8 +241,14 @@ static void rk3399_force_power_on_reset(void) } #endif +void __weak led_setup(void) +{ +} + void spl_board_init(void) { + led_setup(); + #if defined(SPL_GPIO_SUPPORT) struct rockchip_cru *cru = rockchip_get_cru(); diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 24fe6cc8f0..4c637b7767 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -56,16 +56,14 @@ int dram_init_banksize(void) - CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr + tos_parameter->tee_mem.size; - gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start - + top - gd->bd->bi_dram[1].start; + gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start; } else { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[0].size = 0x8400000; /* Reserve 32M for OPTEE with TA */ gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + gd->bd->bi_dram[0].size + 0x2000000; - gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start - + top - gd->bd->bi_dram[1].start; + gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start; } #else gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 88f80b05a9..cc908e1b0e 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -43,18 +43,11 @@ __weak void rockchip_stimer_init(void) TIMER_CONTROL_REG); } -__weak int board_early_init_f(void) -{ - return 0; -} - void board_init_f(ulong dummy) { struct udevice *dev; int ret; - board_early_init_f(); - #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT) /* * Debug UART can be used from here if required: |