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authorTien Fong Chee <tien.fong.chee@intel.com>2017-12-05 15:58:08 +0800
committerMarek Vasut <marex@denx.de>2018-05-18 10:30:47 +0200
commit011fa5f33dac4f5d7998cf7e9da904b5565691e5 (patch)
treec627accf6fb43f172d7dbe9df533a10a9305b08c /arch/arm/mach-socfpga/misc_arria10.c
parentc960ef29cd1bffccb84366cc6ca9c290cb3c36a0 (diff)
downloadu-boot-011fa5f33dac4f5d7998cf7e9da904b5565691e5.tar.gz
ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot
SoC FPGA info is required in both SPL and U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Diffstat (limited to 'arch/arm/mach-socfpga/misc_arria10.c')
-rw-r--r--arch/arm/mach-socfpga/misc_arria10.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index e1d80a5a76..47a9d50ef1 100644
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -104,11 +104,6 @@ int arch_early_init_r(void)
/* assert reset to all except L4WD0 and L4TIMER0 */
socfpga_per_reset_all();
- /* configuring the clock based on handoff */
- /* TODO: Add call to cm_basic_init() */
-
- /* Add device descriptor to FPGA device table */
- socfpga_fpga_add();
return 0;
}
#else