diff options
| author | Simon Glass <sjg@chromium.org> | 2020-05-10 11:40:12 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-05-18 21:19:23 -0400 |
| commit | f09f1ecbe77863ecefe586ccd6000064b49105a3 (patch) | |
| tree | 424300a0c18924e75e0694782fe3e2ba48e884a0 /arch/arm/mach-socfpga | |
| parent | c05ed00afb95fa5237f16962fccf5810437317bf (diff) | |
| download | u-boot-f09f1ecbe77863ecefe586ccd6000064b49105a3.tar.gz | |
Use __ASSEMBLY__ as the assembly macros
Some places use __ASSEMBLER__ instead which does not work since the
Makefile does not define it. Fix them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/mach-socfpga')
4 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h index c6830582a5..1f734bcd65 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h @@ -8,7 +8,7 @@ phys_addr_t socfpga_get_clkmgr_addr(void); -#ifndef __ASSEMBLER__ +#ifndef __ASSEMBLY__ void cm_wait_for_lock(u32 mask); int cm_wait_for_fsm(void); void cm_print_clock_quick_summary(void); diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h index 23f280df1b..8d62d75432 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h @@ -6,7 +6,7 @@ #ifndef CLOCK_MANAGER_ARRIA10 #define CLOCK_MANAGER_ARRIA10 -#ifndef __ASSEMBLER__ +#ifndef __ASSEMBLY__ /* Clock manager group */ #define CLKMGR_A10_CTRL 0x00 @@ -69,7 +69,7 @@ unsigned long cm_get_mpu_clk_hz(void); unsigned int cm_get_qspi_controller_clk_hz(void); -#endif /* __ASSEMBLER__ */ +#endif /* __ASSEMBLY__ */ #define LOCKED_MASK (CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK | \ CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET_MSK) diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h index 08655094ca..fc6d230156 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h @@ -6,7 +6,7 @@ #ifndef _CLOCK_MANAGER_GEN5_H_ #define _CLOCK_MANAGER_GEN5_H_ -#ifndef __ASSEMBLER__ +#ifndef __ASSEMBLY__ struct cm_config { /* main group */ @@ -107,7 +107,7 @@ const unsigned int cm_get_f2s_sdr_ref_clk_hz(void); /* Clock configuration accessors */ int cm_basic_init(const struct cm_config * const cfg); const struct cm_config * const cm_get_default_config(void); -#endif /* __ASSEMBLER__ */ +#endif /* __ASSEMBLY__ */ #define LOCKED_MASK \ (CLKMGR_INTER_SDRPLLLOCKED_MASK | \ diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h index 25b82fb285..f2773883fd 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h @@ -205,7 +205,7 @@ struct socfpga_io48_mmr { u32 niosreserve2; }; -#endif /*__ASSEMBLY__*/ +#endif /*__ASSEMBLY__ */ #define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_MASK 0x1F000000 #define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_SHIFT 24 |