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| author | Thierry Reding <treding@nvidia.com> | 2019-04-15 11:32:21 +0200 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2019-06-05 09:16:33 -0700 |
| commit | 07ea02bc2dd17a75ec04c5f4ba10b0088f1596d5 (patch) | |
| tree | 6fc5ca1defaf68b7a8ef9aa65e386196d3d07c37 /arch/arm/mach-tegra/board.c | |
| parent | 1a869c703d0493cab9defd4cb5754a175a642052 (diff) | |
| download | u-boot-07ea02bc2dd17a75ec04c5f4ba10b0088f1596d5.tar.gz | |
ARM: tegra: Guard pin controller code with a Kconfig symbol
Pin controller code is not relevant on all Tegra SoC generations, so
guard it with a Kconfig symbol that can be selected by the generations
that need it.
This is in preparation for unifying Tegra186 code with the code used on
older generations.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board.c')
| -rw-r--r-- | arch/arm/mach-tegra/board.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index a9e26bd1a3..fd23de1804 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -12,7 +12,9 @@ #if IS_ENABLED(CONFIG_TEGRA_CLKRST) #include <asm/arch/clock.h> #endif +#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) #include <asm/arch/funcmux.h> +#endif #if IS_ENABLED(CONFIG_TEGRA_MC) #include <asm/arch/mc.h> #endif @@ -132,6 +134,7 @@ int dram_init(void) return 0; } +#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) static int uart_configs[] = { #if defined(CONFIG_TEGRA20) #if defined(CONFIG_TEGRA_UARTA_UAA_UAB) @@ -199,9 +202,11 @@ static void setup_uarts(int uart_ids) } } } +#endif void board_init_uart_f(void) { +#if IS_ENABLED(CONFIG_TEGRA_PINCTRL) int uart_ids = 0; /* bit mask of which UART ids to enable */ #ifdef CONFIG_TEGRA_ENABLE_UARTA @@ -220,6 +225,7 @@ void board_init_uart_f(void) uart_ids |= UARTE; #endif setup_uarts(uart_ids); +#endif } #if !CONFIG_IS_ENABLED(OF_CONTROL) |