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authorTom Rini <trini@konsulko.com>2021-08-27 08:33:02 -0400
committerTom Rini <trini@konsulko.com>2021-08-27 08:33:02 -0400
commitb9cb74a5aa256fc34a1b2b9dd847a985b91f34f6 (patch)
treea618344b253ec3164848e797a2636bbd8f060223 /arch/arm
parent7bfa565453ec5f63668a3464da21629055c3053f (diff)
parent229cb5c6ba3469cbc4a0bcc69389fe61c51fd3b4 (diff)
downloadu-boot-b9cb74a5aa256fc34a1b2b9dd847a985b91f34f6.tar.gz
Merge tag 'xilinx-for-v2021.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblazeWIP/27Aug2021
Xilinx changes for v2021.10-rc3 xilinx: - Disable CONFIG_ARCH_FIXUP_FDT_MEMORY - Print information about cpu via soc drivers and enable DISPLAY_CPUINFO - Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT zynq: - Wire single QSPI - Use power-source instead of io-standard properties - Enable nor on zc770-xm012 zynqmp: - Change handling around multi_boot() - Setup offset for u-boot.itb in spi - Generate run time dfu_alt_info for capsule update - Use explicit values for enums (zynqmp_firmware.h) - Enable RTC/SHA1/BUTTON/BUTTON_GPIO command - Disable WDT driver by default - Bind usb/scsi via preboot because of EFI - DT updates/fixes - Add soc driver - Fix SPL SPI boot mode versal: - Add soc driver sdhci: - Update tap delay programming for zynq_sdhci driver cmd: - Fix RTC uclass handling in date command - Update pwm help message - Update reset help message watchdog: - Fix wwdt compilation rtc: - Deal with seq alias in rtc uclass - Add zynqmp RTC driver fdt: - Add kernel-doc for fdt_fixup_memory_banks()
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/dts/Makefile2
-rw-r--r--arch/arm/dts/zynq-cc108.dts2
-rw-r--r--arch/arm/dts/zynq-cse-qspi.dtsi2
-rw-r--r--arch/arm/dts/zynq-topic-miami.dts2
-rw-r--r--arch/arm/dts/zynq-zc702.dts30
-rw-r--r--arch/arm/dts/zynq-zc706.dts26
-rw-r--r--arch/arm/dts/zynq-zc770-xm010.dts8
-rw-r--r--arch/arm/dts/zynq-zc770-xm012.dts9
-rw-r--r--arch/arm/dts/zynq-zc770-xm013.dts8
-rw-r--r--arch/arm/dts/zynqmp-sck-kv-g-revA.dts8
-rw-r--r--arch/arm/dts/zynqmp-sck-kv-g-revB.dts8
-rw-r--r--arch/arm/dts/zynqmp-sm-k26-revA.dts9
-rw-r--r--arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts2
-rw-r--r--arch/arm/mach-versal/cpu.c5
-rw-r--r--arch/arm/mach-versal/include/mach/hardware.h4
-rw-r--r--arch/arm/mach-zynqmp/cpu.c5
-rw-r--r--arch/arm/mach-zynqmp/include/mach/hardware.h3
-rwxr-xr-xarch/arm/mach-zynqmp/mkimage_fit_atf.sh51
19 files changed, 148 insertions, 38 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d692139199..2d59562665 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1064,6 +1064,7 @@ config ARCH_VERSAL
select DM_SERIAL
select GPIO_EXTRA_HEADER
select OF_CONTROL
+ select SOC_DEVICE
imply BOARD_LATE_INIT
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
@@ -1142,6 +1143,7 @@ config ARCH_ZYNQMP
select SPL_SEPARATE_BSS if SPL
select SUPPORT_SPL
select ZYNQMP_IPI
+ select SOC_DEVICE
imply BOARD_LATE_INIT
imply CMD_DM
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 82a0790cc0..fc16a57e60 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1133,7 +1133,7 @@ dtb-$(CONFIG_TARGET_EA_LPC3250DEVKITV2) += lpc3250-ea3250.dtb
targets += $(dtb-y)
# Add any required device tree compiler flags here
-DTC_FLAGS +=
+DTC_FLAGS += -a 0x8
PHONY += dtbs
dtbs: $(addprefix $(obj)/, $(dtb-y))
diff --git a/arch/arm/dts/zynq-cc108.dts b/arch/arm/dts/zynq-cc108.dts
index 64d73ecbc5..036106e221 100644
--- a/arch/arm/dts/zynq-cc108.dts
+++ b/arch/arm/dts/zynq-cc108.dts
@@ -58,7 +58,7 @@
is-dual = <0>;
num-cs = <1>;
flash@0 { /* 16 MB */
- compatible = "n25q128a11";
+ compatible = "n25q128a11", "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <50000000>;
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi
index eb0e29e6cb..38410eeca8 100644
--- a/arch/arm/dts/zynq-cse-qspi.dtsi
+++ b/arch/arm/dts/zynq-cse-qspi.dtsi
@@ -60,7 +60,7 @@
#size-cells = <0>;
num-cs = <1>;
flash0: flash@0 {
- compatible = "n25q128a11";
+ compatible = "n25q128a11", "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
diff --git a/arch/arm/dts/zynq-topic-miami.dts b/arch/arm/dts/zynq-topic-miami.dts
index ab6bde95fe..c4ec56138e 100644
--- a/arch/arm/dts/zynq-topic-miami.dts
+++ b/arch/arm/dts/zynq-topic-miami.dts
@@ -36,7 +36,7 @@
is-dual = <0>;
num-cs = <1>;
flash@0 {
- compatible = "st,m25p80", "n25q256a";
+ compatible = "st,m25p80", "n25q256a", "jedec,spi-nor";
m25p,fast-read;
reg = <0x0>;
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts
index 4474f4bfd7..f2e05a55b9 100644
--- a/arch/arm/dts/zynq-zc702.dts
+++ b/arch/arm/dts/zynq-zc702.dts
@@ -213,7 +213,7 @@
conf {
groups = "can0_9_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-rx {
@@ -236,7 +236,7 @@
conf {
groups = "ethernet0_0_grp";
slew-rate = <0>;
- io-standard = <4>;
+ power-source = <4>;
};
conf-rx {
@@ -259,7 +259,7 @@
conf-mdio {
groups = "mdio0_0_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
bias-disable;
};
};
@@ -277,7 +277,7 @@
"gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
"gpio0_13_grp", "gpio0_14_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-pull-up {
@@ -301,7 +301,7 @@
groups = "i2c0_10_grp";
bias-pull-up;
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
};
@@ -314,7 +314,7 @@
conf {
groups = "gpio0_50_grp", "gpio0_51_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
};
@@ -327,7 +327,7 @@
conf {
groups = "sdio0_2_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
bias-disable;
};
@@ -341,7 +341,7 @@
bias-high-impedance;
bias-pull-up;
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
mux-wp {
@@ -354,7 +354,7 @@
bias-high-impedance;
bias-pull-up;
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
};
@@ -367,7 +367,7 @@
conf {
groups = "uart1_10_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-rx {
@@ -390,7 +390,7 @@
conf {
groups = "usb0_0_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-rx {
@@ -409,6 +409,14 @@
&qspi {
u-boot,dm-pre-reloc;
status = "okay";
+ num-cs = <1>;
+ flash@0 {
+ compatible = "n25q128a11", "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <50000000>;
+ };
};
&sdhci0 {
diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts
index 84729e9feb..cb919e4053 100644
--- a/arch/arm/dts/zynq-zc706.dts
+++ b/arch/arm/dts/zynq-zc706.dts
@@ -151,7 +151,7 @@
conf {
groups = "ethernet0_0_grp";
slew-rate = <0>;
- io-standard = <4>;
+ power-source = <4>;
};
conf-rx {
@@ -174,7 +174,7 @@
conf-mdio {
groups = "mdio0_0_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
bias-disable;
};
};
@@ -188,7 +188,7 @@
conf {
groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-pull-up {
@@ -212,7 +212,7 @@
groups = "i2c0_10_grp";
bias-pull-up;
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
};
@@ -225,7 +225,7 @@
conf {
groups = "sdio0_2_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
bias-disable;
};
@@ -239,7 +239,7 @@
bias-high-impedance;
bias-pull-up;
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
mux-wp {
@@ -252,7 +252,7 @@
bias-high-impedance;
bias-pull-up;
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
};
@@ -265,7 +265,7 @@
conf {
groups = "uart1_10_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-rx {
@@ -288,7 +288,7 @@
conf {
groups = "usb0_0_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-rx {
@@ -307,6 +307,14 @@
&qspi {
u-boot,dm-pre-reloc;
status = "okay";
+ num-cs = <1>;
+ flash@0 {
+ compatible = "n25q128a11", "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <50000000>;
+ };
};
&sdhci0 {
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts
index c547d7921d..002ff9f7f4 100644
--- a/arch/arm/dts/zynq-zc770-xm010.dts
+++ b/arch/arm/dts/zynq-zc770-xm010.dts
@@ -62,6 +62,14 @@
&qspi {
status = "okay";
+ num-cs = <1>;
+ flash@0 {
+ compatible = "n25q128a11", "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <50000000>;
+ };
};
&sdhci0 {
diff --git a/arch/arm/dts/zynq-zc770-xm012.dts b/arch/arm/dts/zynq-zc770-xm012.dts
index 0d001c9161..ccf76e7984 100644
--- a/arch/arm/dts/zynq-zc770-xm012.dts
+++ b/arch/arm/dts/zynq-zc770-xm012.dts
@@ -53,6 +53,15 @@
};
};
+&nor0 {
+ status = "okay";
+ bank-width = <1>;
+};
+
+&smcc {
+ status = "okay";
+};
+
&spi1 {
status = "okay";
num-cs = <4>;
diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts
index 7218ee3ad8..455c8a9610 100644
--- a/arch/arm/dts/zynq-zc770-xm013.dts
+++ b/arch/arm/dts/zynq-zc770-xm013.dts
@@ -61,6 +61,14 @@
&qspi {
status = "okay";
+ num-cs = <1>;
+ flash@0 {
+ compatible = "n25q128a11", "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <50000000>;
+ };
};
&spi0 {
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
index 4e8086c82f..22602d8c33 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
@@ -12,10 +12,10 @@
* Michal Simek <michal.simek@xilinx.com>
*/
- #include <dt-bindings/gpio/gpio.h>
- #include <dt-bindings/net/ti-dp83867.h>
- #include <dt-bindings/phy/phy.h>
- #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/net/ti-dp83867.h>
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
/dts-v1/;
/plugin/;
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
index 048d5665c5..df054e152a 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
@@ -7,10 +7,10 @@
* Michal Simek <michal.simek@xilinx.com>
*/
- #include <dt-bindings/gpio/gpio.h>
- #include <dt-bindings/net/ti-dp83867.h>
- #include <dt-bindings/phy/phy.h>
- #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/net/ti-dp83867.h>
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
/dts-v1/;
/plugin/;
diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts
index b613ab2342..5f55df28f3 100644
--- a/arch/arm/dts/zynqmp-sm-k26-revA.dts
+++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts
@@ -60,13 +60,13 @@
leds {
compatible = "gpio-leds";
- ds35 {
+ ds35-led {
label = "heartbeat";
gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
- ds36 {
+ ds36-led {
label = "vbus_det";
gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
default-state = "on";
@@ -183,7 +183,7 @@
};
};
-&sdhci0 { /* MIO13-23 - 16GB emmc MTFC16GAPALBH-IT - U133A*/
+&sdhci0 { /* MIO13-23 - 16GB emmc MTFC16GAPALBH-IT - U133A */
status = "okay";
non-removable;
disable-wp;
@@ -204,17 +204,20 @@
&i2c1 {
status = "okay";
+ u-boot,dm-pre-reloc;
clock-frequency = <400000>;
scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
eeprom: eeprom@50 { /* u46 - also at address 0x58 */
+ u-boot,dm-pre-reloc;
compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */
reg = <0x50>;
/* WP pin EE_WP_EN connected to slg7x644092@68 */
};
eeprom_cc: eeprom@51 { /* required by spec - also at address 0x59 */
+ u-boot,dm-pre-reloc;
compatible = "st,24c64", "atmel,24c64"; /* st m24c64 */
reg = <0x51>;
};
diff --git a/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts b/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts
index 6ec96e0e8c..300e2ebe96 100644
--- a/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts
+++ b/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts
@@ -58,7 +58,7 @@
status = "okay";
is-dual = <1>;
flash@0 {
- compatible = "st,m25p80", "n25q256a";
+ compatible = "st,m25p80", "n25q256a", "jedec,spi-nor";
m25p,fast-read;
reg = <0x0>;
spi-tx-bus-width = <1>;
diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index a35aac2c02..9dc308bbc3 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -13,6 +13,7 @@
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
#include <asm/cache.h>
+#include <dm/platdata.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -120,3 +121,7 @@ int arm_reserve_mmu(void)
return 0;
}
#endif
+
+U_BOOT_DRVINFO(soc_xilinx_versal) = {
+ .name = "soc_xilinx_versal",
+};
diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h
index 9af5afd3f3..7b728ac110 100644
--- a/arch/arm/mach-versal/include/mach/hardware.h
+++ b/arch/arm/mach-versal/include/mach/hardware.h
@@ -65,6 +65,10 @@ struct crp_regs {
#define crp_base ((struct crp_regs *)VERSAL_CRP_BASEADDR)
+#define VERSAL_PS_PMC_VERSION 0xF11A0004
+#define VERSAL_PS_VER_MASK GENMASK(7, 0)
+#define VERSAL_PS_VER_SHIFT 12
+
/* Bootmode setting values */
#define BOOT_MODES_MASK 0x0000000F
#define QSPI_MODE_24BIT 0x00000001
diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
index 29743cae5a..26e285c24f 100644
--- a/arch/arm/mach-zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -15,6 +15,7 @@
#include <asm/io.h>
#include <zynqmp_firmware.h>
#include <asm/cache.h>
+#include <dm/platdata.h>
#define ZYNQ_SILICON_VER_MASK 0xF000
#define ZYNQ_SILICON_VER_SHIFT 12
@@ -218,3 +219,7 @@ int zynqmp_mmio_read(const u32 address, u32 *value)
return ret;
}
+
+U_BOOT_DRVINFO(soc_xilinx_zynqmp) = {
+ .name = "soc_xilinx_zynqmp",
+};
diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h
index 3776499070..eebf38551c 100644
--- a/arch/arm/mach-zynqmp/include/mach/hardware.h
+++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
@@ -69,6 +69,9 @@ struct iou_scntr_secure {
#define iou_scntr_secure ((struct iou_scntr_secure *)ZYNQMP_IOU_SCNTR_SECURE)
+#define ZYNQMP_PS_VERSION 0xFFCA0044
+#define ZYNQMP_PS_VER_MASK GENMASK(1, 0)
+
/* Bootmode setting values */
#define BOOT_MODES_MASK 0x0000000F
#define QSPI_MODE_24BIT 0x00000001
diff --git a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh
index 592be7f670..72a8a3eb77 100755
--- a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh
+++ b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh
@@ -57,7 +57,7 @@ cat << __HEADER_EOF
/dts-v1/;
/ {
- description = "Configuration to load ATF before U-Boot";
+ description = "Configuration for Xilinx ZynqMP SoC";
images {
uboot {
@@ -78,7 +78,7 @@ __HEADER_EOF
if [ -f $BL31 ]; then
cat << __ATF
atf {
- description = "ARM Trusted Firmware";
+ description = "Trusted Firmware-A";
data = /incbin/("$BL31");
type = "firmware";
os = "arm-trusted-firmware";
@@ -111,6 +111,51 @@ cat << __TEE
__TEE
fi
+MULTI_DTB=`awk '/CONFIG_MULTI_DTB_FIT / { print $3 }' include/generated/autoconf.h`
+
+if [ 1"$MULTI_DTB" -eq 11 ]; then
+ cat << __FDT_IMAGE_EOF
+ fdt_1 {
+ description = "Multi DTB fit image";
+ data = /incbin/("fit-dtb.blob");
+ type = "flat_dt";
+ arch = "arm64";
+ compression = "none";
+ $DTB_LOAD
+ hash {
+ algo = "md5";
+ };
+ };
+ };
+ configurations {
+ default = "config_1";
+__FDT_IMAGE_EOF
+
+if [ ! -f $BL31 ]; then
+cat << __CONF_SECTION1_EOF
+ config_1 {
+ description = "Multi DTB without TF-A";
+ firmware = "uboot";
+ loadables = "fdt_1";
+ };
+__CONF_SECTION1_EOF
+else
+cat << __CONF_SECTION1_EOF
+ config_1 {
+ description = "Multi DTB with TF-A";
+ firmware = "atf";
+ loadables = "uboot", "fdt_1";
+ };
+__CONF_SECTION1_EOF
+fi
+
+cat << __ITS_EOF
+ };
+};
+__ITS_EOF
+
+else
+
DEFAULT=1
cnt=1
for dtname in $DT
@@ -181,3 +226,5 @@ cat << __ITS_EOF
};
};
__ITS_EOF
+
+fi