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| author | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2017-02-02 15:02:00 +0530 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-02-03 14:31:45 -0800 |
| commit | add63f94a9c3bbe1af3fdf3f4c56a5185a4c0504 (patch) | |
| tree | 42764dc1d5255e15910c9df403ed2969379cdb96 /arch/powerpc/cpu/mpc85xx/Kconfig | |
| parent | 068789773d0b369a6a64120776932f912d183f61 (diff) | |
| download | u-boot-add63f94a9c3bbe1af3fdf3f4c56a5185a4c0504.tar.gz | |
arch: powerpc: update the eLBC IP input clock
eLBC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock ratio register (LCRR) used in
current implementation governs eLBC IP output cloc.
Update sys_info->freq_localbus to represent eLBC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/Kconfig')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index c06a4db8fc..592b58171a 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1337,6 +1337,24 @@ config SYS_FSL_IFC_CLK_DIV Defines divider of platform clock(clock input to IFC controller). +config SYS_FSL_LBC_CLK_DIV + int "Divider of platform clock" + depends on FSL_ELBC || ARCH_MPC8540 || \ + ARCH_MPC8548 || ARCH_MPC8541 || \ + ARCH_MPC8555 || ARCH_MPC8560 || \ + ARCH_MPC8568 + + default 2 if ARCH_P2041 || \ + ARCH_P3041 || \ + ARCH_P4080 || \ + ARCH_P5020 || \ + ARCH_P5040 + default 1 + + help + Defines divider of platform clock(clock input to + eLBC controller). + source "board/freescale/b4860qds/Kconfig" source "board/freescale/bsc9131rdb/Kconfig" source "board/freescale/bsc9132qds/Kconfig" |