diff options
| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-08-20 09:35:28 +0000 |
|---|---|---|
| committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-08-26 21:23:21 +0530 |
| commit | ec70cedbceaee6c418fde79530a2761b94d0d94b (patch) | |
| tree | 2c84fcfce4c2808e9f0d5933fae68a160dd22dea /arch/powerpc/dts/p1020.dtsi | |
| parent | fa3602859f795d3dda1c625052105bf6aea22b20 (diff) | |
| download | u-boot-ec70cedbceaee6c418fde79530a2761b94d0d94b.tar.gz | |
powerpc: Enable device tree support for P1020RDB
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'arch/powerpc/dts/p1020.dtsi')
| -rw-r--r-- | arch/powerpc/dts/p1020.dtsi | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/powerpc/dts/p1020.dtsi b/arch/powerpc/dts/p1020.dtsi new file mode 100644 index 0000000000..ee2b6f4945 --- /dev/null +++ b/arch/powerpc/dts/p1020.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1020 Silicon/SoC Device Tree Source (pre include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * Copyright 2019 NXP + */ + +/dts-v1/; + +/include/ "e500v2_power_isa.dtsi" + +/ { + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,P1020@0 { + device_type = "cpu"; + reg = <0>; + }; + cpu1: PowerPC,P1020@1 { + device_type = "cpu"; + reg = <1>; + }; + }; +}; |