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| author | Tang Yuantian <yuantian.tang@freescale.com> | 2014-07-04 17:39:26 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-07-22 16:25:55 -0700 |
| commit | 7cb7272365983e3a1eedf18a9f688c825e1cf95e (patch) | |
| tree | 5ce567157d236767a0f05940045bf6f8c3c27ca3 /arch/powerpc/lib | |
| parent | a1399a918720337ad14053cf6185786aa33b58b2 (diff) | |
| download | u-boot-7cb7272365983e3a1eedf18a9f688c825e1cf95e.tar.gz | |
mpc85xx/t104x: Enable L2 and CPC cache when resume
When resume from deep sleep, uboot needs to enable L2 and CPC
cache, or they would be keeping unusable in kernel because
kernel didn't enble or initialized them.
This patch didn't change the existing L2 cache enabling code,
just put them in a function.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/lib')
| -rw-r--r-- | arch/powerpc/lib/board.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 300ab12a3b..50eb820336 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -370,6 +370,11 @@ void board_init_f(ulong bootflag) #ifdef CONFIG_DEEP_SLEEP /* Jump to kernel in deep sleep case */ if (in_be32(&gur->scrtsr[0]) & (1 << 3)) { + l2cache_init(); +#if defined(CONFIG_RAMBOOT_PBL) + disable_cpc_sram(); +#endif + enable_cpc(); start_addr = in_be32(&scfg->sparecr[1]); kernel_resume = (func_t)start_addr; kernel_resume(); |