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| author | Tianrui Wei <tianrui-wei@outlook.com> | 2021-07-07 15:48:22 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2021-07-07 20:34:02 +0800 |
| commit | c9135d5a7af2df0e273e0f7e2f6c8132b34aba82 (patch) | |
| tree | 4cfb03837a824de2a17cfa556fb9854a63f034ea /arch/riscv | |
| parent | 5617efd2c882562b716a61bc0dc0edda46b045df (diff) | |
| download | u-boot-c9135d5a7af2df0e273e0f7e2f6c8132b34aba82.tar.gz | |
riscv: dts: add OpenPiton RISC-V board dts support
Previous device tree for OpenPiton emits a warning during compilation.
This commit fixes the previous warning adds dts to the OpenPiton RISC-V
board and added the device tree to MAINTAINER file.
Signed-off-by: Tianrui Wei <tianrui-wei@outlook.com>
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/dts/openpiton-riscv64.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/dts/openpiton-riscv64.dts b/arch/riscv/dts/openpiton-riscv64.dts index 45951e1236..abc6016a0b 100644 --- a/arch/riscv/dts/openpiton-riscv64.dts +++ b/arch/riscv/dts/openpiton-riscv64.dts @@ -80,8 +80,8 @@ }; soc { - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; compatible = "openpiton,chipset", "simple-bus"; ranges; |